An Experimental Study of SYCL Task Graph Parallelism for Large-Scale Machine Learning Workloads. - Cheng-Hsiang Chiu; Dian-Lun Lin; Tsung-Wei Huang (Euro-Par Workshops, 2021)

Efficient timing propagation with simultaneous structural and pipeline parallelisms: late breaking results. - Cheng-Hsiang Chiu; Tsung-Wei Huang (DAC, 2022)

Composing Pipeline Parallelism using Control Taskflow Graph. - Cheng-Hsiang Chiu; Tsung-Wei Huang (HPDC, 2022)

Pipeflow: An Efficient Task-Parallel Pipeline Programming Framework using Modern C++. - Cheng-Hsiang Chiu; Tsung-Wei Huang; Zizheng Guo; Yibo Lin (CoRR, 2022)

Invited Paper: Programming Dynamic Task Parallelism for Heterogeneous EDA Algorithms. - Cheng-Hsiang Chiu; Dian-Lun Lin; Tsung-Wei Huang (ICCAD, 2023)

A Resource-efficient Task Scheduling System using Reinforcement Learning : Invited Paper. - Chedi Morchdi; Cheng-Hsiang Chiu; Yi Zhou 017; Tsung-Wei Huang (ASPDAC, 2024)

G-PASTA: GPU-Accelerated Partitioning Algorithm for Static Timing Analysis. - Boyang Zhang; Dian-Lun Lin; Che Chang; Cheng-Hsiang Chiu; Bojue Wang; Wan-Luan Lee; Chih-Chun Chang; Donghao Fang; Tsung-Wei Huang (DAC, 2024)

An Efficient Task-Parallel Pipeline Programming Framework. - Cheng-Hsiang Chiu; Zhicheng Xiong; Zizheng Guo; Tsung-Wei Huang; Yibo Lin (HPC Asia, 2024)

Reinforcement Learning-Generated Topological Order for Dynamic Task Graph Scheduling. - Cheng-Hsiang Chiu; Chedi Morchdi; Yi Zhou 017; Boyang Zhang; Che Chang; Tsung-Wei Huang (HPEC, 2024)

Parallel and Heterogeneous Timing Analysis: Partition, Algorithm, and System. - Tsung-Wei Huang; Boyang Zhang; Dian-Lun Lin; Cheng-Hsiang Chiu (ISPD, 2024)

Incremental Critical Path Generation for Dynamic Graphs. - Che Chang; Cheng-Hsiang Chiu; Boyang Zhang; Tsung-Wei Huang (ISVLSI, 2024)

An Experimental Study of Dynamic Task Graph Parallelism for Large-Scale Circuit Analysis Workloads. - Cheng-Hsiang Chiu; Tsung-Wei Huang (ISVLSI, 2024)

PathGen: An Efficient Parallel Critical Path Generation Algorithm. - Che Chang; Boyang Zhang; Cheng-Hsiang Chiu; Dian-Lun Lin; Yi-Hua Chung; Wan-Luan Lee; Zizheng Guo; Yibo Lin; Tsung-Wei Huang (ASP-DAC, 2025)

HyperG: Multilevel GPU-Accelerated k-way Hypergraph Partitioner. - Wan-Luan Lee; Dian-Lun Lin; Cheng-Hsiang Chiu; Ulf Schlichtmann; Tsung-Wei Huang (ASP-DAC, 2025)

iTAP: An Incremental Task Graph Partitioner for Task-parallel Static Timing Analysis. - Boyang Zhang; Che Chang; Cheng-Hsiang Chiu; Dian-Lun Lin; Yang Sui; Chih-Chun Chang; Yi-Hua Chung; Wan-Luan Lee; Zizheng Guo; Yibo Lin; Tsung-Wei Huang (ASP-DAC, 2025)