A Systematic Study of ESD Protection Co-Design With High-Speed and High-Frequency ICs in 28 nm CMOS. - Fei Lu 004; Rui Ma 003; Zongyu Dong; Li Wang 058; Chen Zhang 017; Chenkun Wang; Qi Chen 008; X. Shawn Wang; Feilong Zhang 001; Cheng Li 029; He Tang 003; Yuhua Cheng; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

Characterization of single-crystalline graphene ESD interconnects. - Qi Chen 008; Cheng Li 029; Fei Lu 004; Chenkun Wang; Feilong Zhang 001; Tianru Wu; Xiaoming Xie; Kun Zhang; Xinxin Li; Jimmy Ng; Ya-Hong Xie; Yuhua Cheng; et al. (ASICON, 2017)

Key note: Integrated design-for-reliability for ICs. - Albert Z. Wang; Fei Lu 004; Qi Chen 008; Chenkun Wang; Cheng Li 029; Feilong Zhang 001 (LASCAS, 2017)

TLP measurement and analysis of graphene NEMS switches for on-chip ESD protection. - Qi Chen 008; Cheng Li 029; Fei Lu 004; Chenkun Wang; Feilong Zhang 001; Albert Z. Wang; Jimmy Ng; Ya-Hong Xie (NEMS, 2017)

More-Than-Moore: 3D heterogeneous integration into CMOS technologies. - Albert Z. Wang; Qi Chen 008; Cheng Li 029; Fei Lu 004; Chenkun Wang; Feilong Zhang 001; X. Shawn Wang; Jimmy Ng; Ya-Hong Xie; Rui Ma 003; Li Wang 058; Lin Lin 011 (NEMS, 2017)

3D heterogeneous integration enabling future RF ICs. - Qi Chen 008; Chenkun Wang; Feilong Zhang 001; Cheng Li 029; Albert Z. Wang (RWS, 2018)

A study of impacts of ESD protection on 28/38GHz RF switches in 45nm SOI CMOS for 5G mobile applications. - Chenkun Wang; Fei Lu 004; Qi Chen 008; Feilong Zhang 001; Cheng Li 029; Dawn Wang; Albert Z. Wang (RWS, 2018)

Developing 3D Heterogeneous Structures for Future Chips. - Cheng Li 029; Feilong Zhang 001; Mengfu Di; Zijin Pan; Albert Z. Wang (ICICDT, 2019)

Visible Light Communication Cyber-Physical Systems-on- Chip for Smart Cities. - Zijin Pan; Tian Lang; Cheng Li 029; Mengfu Di; Gang Chen 007; Yehuda E. Kalay; Ramdas Pai; Albert Z. Wang (J. Commun., 2019)

A Full-Chip ESD Protection Circuit Simulation and Fast Dynamic Checking Method Using SPICE and ESD Behavior Models. - Feilong Zhang 001; Chenkun Wang; Fei Lu 004; Qi Chen 008; Cheng Li 029; X. Shawn Wang; Daguang Li; Albert Z. Wang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

A Study of Transient Voltage Peaking in Diode-Based ESD Protection Structures in 28nm CMOS. - Chenkun Wang; Feilong Zhang 001; Fei Lu 004; Qi Chen 008; Cheng Li 029; Albert Z. Wang (IEEE Access, 2020)