A 28mn 320Kb TCAM Macro with Sub-0.8ns Search Time and 3.5+x Improvement in Delay-Area-Energy Product using Split-Controlled Single-Load 14T Cell. - Cheng-Xin Xue; Wei-Cheng Zhao; Tzu-Hsien Yang; Yi-Ju Chen; Hiroyuki Yamauchi; Meng-Fan Chang (A-SSCC, 2018)

A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors. - Wei-Hao Chen; Kai-Xiang Li; Wei-Yu Lin; Kuo-Hsiang Hsu; Pin-Yi Li; Cheng-Han Yang; Cheng-Xin Xue; En-Yu Yang; Yen-Kai Chen; Yun-Sheng Chang; Tzu-Hsiang Hsu; Ya-Chin King; et al. (ISSCC, 2018)

Circuit Design Challenges in Computing-in-Memory for AI Edge Devices. - Xin Si; He Qian; Meng-Fan Chang; Cheng-Xin Xue; Jian-Wei Su; Zhixiao Zhang; Sih-Han Li; Shyh-Shyuan Sheu; Heng-Yuan Lee; Ping-Cheng Chen; Huaqiang Wu (ASICON, 2019)

Challenges in Circuit Designs of Nonvolatile-memory based computing-in-memory for AI Edge Devices. - Cheng-Xin Xue; Meng-Fan Chang (ISOCC, 2019)

A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN Based AI Edge Processors. - Cheng-Xin Xue; Wei-Hao Chen; Je-Syu Liu; Jia-Fang Li; Wei-Yu Lin; Wei-En Lin; Jing-Hong Wang; Wei-Chen Wei; Ting-Wei Chang; Tung-Cheng Chang; Tsung-Yuan Huang; Hui-Yao Kao; et al. (ISSCC, 2019)

Considerations Of Integrating Computing-In-Memory And Processing-In-Sensor Into Convolutional Neural Network Accelerators For Low-Power Edge Devices. - Kea-Tiong Tang; Wei-Chen Wei; Zuo-Wei Yeh; Tzu-Hsiang Hsu; Yen-Cheng Chiu; Cheng-Xin Xue; Yu-Chun Kuo; Tai-Hsing Wen; Mon-Shu Ho; Chung-Chuan Lo; Ren-Shuo Liu; Chih-Cheng Hsieh; et al. (VLSI Circuits, 2019)

Resistive Memory-Based In-Memory Computing: From Device and Large-Scale Integration System Perspectives. - Bonan Yan; Bing Li 017; Ximing Qiao; Cheng-Xin Xue; Meng-Fan Chang; Yiran Chen 001; Hai Helen Li (Adv. Intell. Syst., 2019)

A 28-nm 320-Kb TCAM Macro Using Split-Controlled Single-Load 14T Cell and Triple-Margin Voltage Sense Amplifier. - Cheng-Xin Xue; Wei-Cheng Zhao; Tzu-Hsien Yang; Yi-Ju Chen; Hiroyuki Yamauchi; Meng-Fan Chang (IEEE J. Solid State Circuits, 2019)

A 0.21V 40nm NAND-ROM for IoT Sensing Systems with Long Standby Periods. - Jinn-Shyan Wang; Cheng-Xin Xue; Chien-Tung Liu; Tay-Jyi Lin (ISCAS, 2020)

13.4 A 22nm 1Mb 1024b-Read and Near-Memory-Computing Dual-Mode STT-MRAM Macro with 42.6GB/s Read Bandwidth for Security-Aware Mobile Devices. - Tung-Cheng Chang; Yen-Cheng Chiu; Chun-Ying Lee; Je-Min Hung; Kuang-Tang Chang; Cheng-Xin Xue; Ssu-Yen Wu; Hui-Yao Kao; Peng Chen; Hsiao-Yu Huang; Shih-Hsih Teng; Meng-Fan Chang (ISSCC, 2020)

33.2 A Fully Integrated Analog ReRAM Based 78.4TOPS/W Compute-In-Memory Chip with Fully Parallel MAC Computing. - Qi Liu 010; Bin Gao 006; Peng Yao; Dong Wu; Junren Chen; Yachuan Pang; Wenqiang Zhang; Yan Liao; Cheng-Xin Xue; Wei-Hao Chen; Jianshi Tang; Yu Wang 002; et al. (ISSCC, 2020)

15.4 A 22nm 2Mb ReRAM Compute-in-Memory Macro with 121-28TOPS/W for Multibit MAC Computing for Tiny AI Edge Devices. - Cheng-Xin Xue; Tsung-Yuan Huang; Je-Syu Liu; Ting-Wei Chang; Hui-Yao Kao; Jing-Hong Wang; Ta-Wei Liu; Shih-Ying Wei; Sheng-Po Huang; Wei-Chen Wei; Yi-Ren Chen; Tzu-Hsiang Hsu; et al. (ISSCC, 2020)

Embedded 1-Mb ReRAM-Based Computing-in- Memory Macro With Multibit Input and Weight for CNN-Based AI Edge Processors. - Cheng-Xin Xue; Ting-Wei Chang; Tung-Cheng Chang; Hui-Yao Kao; Yen-Cheng Chiu; Chun-Ying Lee; Ya-Chin King; Chrong Jung Lin; Ren-Shuo Liu; Chih-Cheng Hsieh; Kea-Tiong Tang; Wei-Hao Chen; et al. (IEEE J. Solid State Circuits, 2020)

A 22nm 4Mb 8b-Precision ReRAM Computing-in-Memory Macro with 11.91 to 195.7TOPS/W for Tiny AI Edge Devices. - Cheng-Xin Xue; Je-Min Hung; Hui-Yao Kao; Yen-Hsiang Huang; Sheng-Po Huang; Fu-Chun Chang; Peng Chen; Ta-Wei Liu; Chuan-Jia Jhang; Chin-I Su; Win-San Khwa; Chung-Chuan Lo; et al. (ISSCC, 2021)

Challenges and Trends of SRAM-Based Computing-In-Memory for AI Edge Devices. - Chuan-Jia Jhang; Cheng-Xin Xue; Je-Min Hung; Fu-Chun Chang; Meng-Fan Chang (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

A 22-nm 1-Mb 1024-b Read Data-Protected STT-MRAM Macro With Near-Memory Shift-and-Rotate Functionality and 42.6-GB/s Read Bandwidth for Security-Aware Mobile Device. - Yen-Cheng Chiu; Tung-Cheng Chang; Chun-Ying Lee; Je-Min Hung; Kuang-Tang Chang; Cheng-Xin Xue; Ssu-Yen Wu; Hui-Yao Kao; Peng Chen; Hsiao-Yu Huang; Shih-Hsih Teng; Chieh-Pu Lo; et al. (IEEE J. Solid State Circuits, 2022)

A 70.85-86.27TOPS/W PVT-Insensitive 8b Word-Wise ACIM with Post-Processing Relaxation. - Sung-En Hsieh; Chun-Hao Wei; Cheng-Xin Xue; Hung-Wei Lin; Wei-Hsuan Tu; En-Jui Chang; Kai-Taing Yang; Po-Heng Chen; Wei-Nan Liao; Li Lian Low; Chia-Da Lee; Allen-Cl Lu; et al. (ISSCC, 2023)

A 12-nm 0.62-1.61 mW Ultra-Low Power Digital CIM-based Deep-Learning System for End-to-End Always-on Vision. - En-Jui Chang; Cheng-Xin Xue; Chetan Deshpande; Gajanan Jedhe; Jenwei Liang; Chih-Chung Cheng; Hung-Wei Lin; Chia-Da Lee; Sushil Kumar; Kim Soon Jway; Zijie Guo; Ritesh Garg; et al. (VLSI Technology and Circuits, 2023)

A 12nm 137 TOPS/W Digital Compute-In-Memory using Foundry 8T SRAM Bitcell supporting 16 Kernel Weight Sets for AI Edge Applications. - Gajanan Jedhe; Chetan Deshpande; Sushil Kumar; Cheng-Xin Xue; Zijie Guo; Ritesh Garg; Kim Soon Jway; En-Jui Chang; Jenwei Liang; Zhe Wan; Zhenhao Pan (VLSI Technology and Circuits, 2023)

20.1 NVE: A 3nm 23.2TOPS/W 12b-Digital-CIM-Based Neural Engine for High-Resolution Visual-Quality Enhancement on Smart Devices. - Ming-En Shih; Shih-Wei Hsieh; Ping-Yuan Tsai; Ming-Hung Lin; Pei-Kuei Tsung; En-Jui Chang; Jenwei Liang; Shu-Hsin Chang; Chung-Lun Huang; You-Yu Nian; Zhe Wan; Sushil Kumar; et al. (ISSCC, 2024)