Optimal design of high fan-in multiplexers via mixed-integer nonlinear programming. - Hsu-Wei Huang; Cheng-Yeh Wang; Jing-Yang Jou (ASP-DAC, 2004)

Communication-driven task binding for multiprocessor with latency insensitive network-on-chip. - Liang-Yu Lin; Cheng-Yeh Wang; Pao-Jui Huang; Chih-Chieh Chou; Jing-Yang Jou (ASP-DAC, 2005)

An efficient heterogeneous tree multiplexer synthesis technique. - Hsu-Wei Huang; Cheng-Yeh Wang; Jing-Yang Jou (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005)

A CMOS 15-bit 125-MS/s Time-Interleaved ADC With Digital Background Calibration. - Zwei-Mei Lee; Cheng-Yeh Wang; Jieh-Tsorng Wu (IEEE J. Solid State Circuits, 2007)

Hybrid Wordlength Optimization Methods of Pipelined FFT Processors. - Cheng-Yeh Wang; Chih-Bin Kuo; Jing-Yang Jou (IEEE Trans. Computers, 2007)