Efficient high-speed/low-power line-based architecture for two-dimensional discrete wavelet transform using lifting scheme. - Cheng-Yi Xiong; Jin-Wen Tian; Jian Liu 011 (IEEE Trans. Circuits Syst. Video Technol., 2006)

A note on "Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet Transform". - Cheng-Yi Xiong; Jin-Wen Tian; Jian Liu 011 (IEEE Trans. Signal Process., 2006)

Efficient array architectures for multi-dimensional lifting-based discrete wavelet transforms. - Cheng-Yi Xiong; Jian-Hua Hou; Jin-Wen Tian; Jian Liu 011 (Signal Process., 2007)

Efficient Architectures for Two-Dimensional Discrete Wavelet Transform Using Lifting Scheme. - Cheng-Yi Xiong; Jin-Wen Tian; Jian Liu 011 (IEEE Trans. Image Process., 2007)

High performance word level sequential and parallel coding methods and architectures for bit plane coding. - Cheng-Yi Xiong; Jin-Wen Tian; Jian Liu 011 (Sci. China Ser. F Inf. Sci., 2008)