Chengying Chen

This page is a disambiguation page, it actually contains mutiple papers from persons of the same or a similar name.

Bibliography

2024
A 1.8 V 98.6 dB SNDR discrete-time CMOS delta-sigma ADC.
Microelectron. J., February, 2024

2023
A Security-Enhanced, Charge-Pump-Free, ISO14443-A-/ISO10373-6-Compliant RFID Tag With 16.2-μW Embedded RRAM and Reconfigurable Strong PUF.
IEEE Trans. Very Large Scale Integr. Syst., February, 2023

An improved all-optical diffractive deep neural network with less parameters for gesture recognition.
J. Vis. Commun. Image Represent., February, 2023

A Fully-integrated Analog Front-end for Carbon-based Short-wave Infrared Image Sensor.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

A 10Gbps High-Speed Low-Noise Optical Receiver Based on CMOS 45nm Technology.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

2022
A 13 µW Analog Front-End with RRAM-Based Lowpass FIR Filter for EEG Signal Detection.
Sensors, 2022

Design of X-Band 6-Bit Wideband Logic Control Phase Shifter.
Proceedings of the 5th International Conference on Electronics and Electrical Engineering Technology, 2022

2020
A Wide-Band High-Resolution Transmitter for Optical Isolation Amplifier.
J. Electr. Comput. Eng., 2020

2019
A 79-dB SNR 1.1-mW Fully Integrated Hearing Aid SoC.
Circuits Syst. Signal Process., 2019

A 1-V, 82-dB SNR Analog Front-End with Peak-Statistics and Comparative-DWA Algorithm.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
A 0.6V, 8.4uW AFE circuit for biomedical signal recording.
Microelectron. J., 2018

A Mixed-Signal Programmable Time-Division Power-On-Reset and Volume Control Circuit for High-Resolution Hearing-Aid SoC Application.
J. Electr. Comput. Eng., 2018

The application of non-volatile look-up-table operations based on multilevel-cell of resistance switching random access memory.
Proceedings of the 2018 International Symposium on VLSI Design, 2018

A Novel Portfolio Optimization with Short Selling Using GNQTS and Trend Ratio.
Proceedings of the IEEE International Conference on Systems, Man, and Cybernetics, 2018

A 66-dB SNDR, 8-μW analog front-end for ECG/EEG recording application.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
A Hardware Efficient Multiple-Stream Pipeline FFT Processor for MIMO-OFDM Systems.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017

Design of a High-Throughput Sliding Block Viterbi Decoder for IEEE 802.11ac WLAN Systems.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017

A PMOS read-port 8T SRAM cell with optimized leakage power and enhanced performance.
IEICE Electron. Express, 2017

A 130nm 1Mb HfOx embedded RRAM macro using self-adaptive peripheral circuit system techniques for 1.6X work temperature range.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

A 76μW, 58-dB SNDR analog front-end chip for implantable intraocular pressure detection.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

A 58-dB SNDR 1.32-mW chopper-stabilized analog front-end for graphene hall element detecting application.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016
A 69-dB SNR 89-<i>μ</i>W AGC for Multifrequency Signal Processing Based on Peak-Statistical Algorithm and Judgment Logic.
VLSI Design, 2016

A 128 Kb HfO<sub>2</sub> ReRAM with Novel Double-Reference and Dynamic-Tracking scheme for write yield improvement.
IEICE Electron. Express, 2016

A 1V, 1.1mW mixed-signal hearing aid SoC in 0.13μm CMOS process.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015
A 1-V, 1.2-mA fully integrated SoC for digital hearing aids.
Microelectron. J., 2015

A Low Power, High Performance Analog Front-End Circuit for 1 V Digital Hearing Aid SoC.
Circuits Syst. Signal Process., 2015

A PVT variation tolerant and low power 5Gb/s clock and data recovery circuit for PCI-E 2.0/USB 3.0.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015


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