A 0.8-3.2 GHz PLL with wide frequency division ratio range. - Jin Wu 004; Jinwen Li; Xudong Wu; Chenggong Wan; Lixia Zheng; Weifeng Sun (Microelectron. J., 2022)

High-Precision Time Interval Measurement Method Based on Sliding Scaled Time-to-Digital Conversion Circuit. - Jin Wu 004; Ruiming Zhong; Yuanfeng Sui; Yang Zhao; Chenggong Wan; Lixia Zheng (IEEE Trans. Instrum. Meas., 2022)

A Region of Interest Technique for Event Driven Typed SPAD Readout Circuit. - Minwei Hu; Jin Wu 004; Chenggong Wan; Lixia Zheng (ASICON, 2023)

A SPAD Relative Address Coding for Lateral Resolution Improvement in Coincidence Detection. - Chenggong Wan; Lixia Zheng; Jin Wu 004 (ASICON, 2023)

A low jitter fractional PLL with offset current charge pump. - Jin Wu 004; Minwei Hu; Xudong Wu; Yang Zuo; Chenggong Wan; Lixia Zheng; Weifeng Sun (Microelectron. J., 2023)

A Low-Power Capacitorless LDO Regulator with Transient Enhancement Structure. - Lixia Zheng; Yi Zhu; Huiyong Xian; Jinwen Li; Chenggong Wan; Jin Wu 004; Weifeng Sun (J. Circuits Syst. Comput., 2024)

High-Precision GRO-Based ROIC Adopting Sliding Scale Average Method for SPAD Array. - Lixia Zheng; Yanna Zheng; Chenggong Wan; Xuyan Li; Weifeng Sun; Jin Wu 004 (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A SPAD Image Sensor With Main-Sub-TDC-Based Coincidence Detection. - Chenggong Wan; Yi Zhu; Yingjie Ma; Xue Li; Lixia Zheng; Jin Wu 004; Weifeng Sun (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)