Hearing Two Things at Once: Neurophysiological Indices of Speech Segregation and Identification. - Claude Alain; Karen Reinke; Yu He; Chenghua Wang; Nancy J. Lobaugh (J. Cogn. Neurosci., 2005)

Modelling and Analysis of Power Consumption for Component-Based Embedded Software. - Jun Hu; Xuandong Li; Guoliang Zheng; Chenghua Wang (EUC Workshops, 2006)

Computer simulation of landslides by the contact element method. - Xiaoyu Jiang; Jianping Qiao; Chenghua Wang; Yu Zhao (Comput. Geosci., 2006)

A Method for Logic Circuit Test Generation Based on Boolean Partial Derivative and BDD. - Changqian Wang; Chenghua Wang (CSIE (3), 2009)

Analog Circuit Soft Fault Diagnosis based on PCA and PSO-SVM. - Jian Sun; Chenghua Wang; Jing Sun; Lei Wang (J. Networks, 2013)

RO PUF design in FPGAs with new comparison strategies. - Weiqiang Liu 001; Yifei Yu; Chenghua Wang; Yijun Cui; Máire O'Neill (ISCAS, 2015)

Improving RO PUF design using frequency distribution characteristics. - Yifei Yu; Chenghua Wang; Weiqiang Liu 001; Yijun Cui; Máire O'Neill (IEICE Electron. Express, 2015)

Single Inductor Dual Buck Full-Bridge Inverter. - Feng Hong; Jun Liu; Baojian Ji; Yufei Zhou; Jianhua Wang; Chenghua Wang (IEEE Trans. Ind. Electron., 2015)

Two-Dimensional Direction of Arrival Estimation Using Generalized ESPRIT Algorithm with Non-uniform L-Shaped Array. - Renzheng Cao; Chenghua Wang; Xiaofei Zhang 001 (Wirel. Pers. Commun., 2015)

Reduced-Dimensional PARAFAC-Based Algorithm for Joint Angle and Doppler Frequency Estimation in Monostatic MIMO Radar. - Renzheng Cao; Xiaofei Zhang 001; Chenghua Wang (Wirel. Pers. Commun., 2015)

Live demonstration: An automatic evaluation platform for physical unclonable function test. - Yijun Cui; Chenghua Wang; Weiqiang Liu 001; Máire O'Neill (ISCAS, 2016)

Low-cost configurable ring oscillator PUF with improved uniqueness. - Yijun Cui; Chenghua Wang; Weiqiang Liu 001; Yifei Yu; Máire O'Neill; Fabrizio Lombardi (ISCAS, 2016)

Design and evaluation of an approximate Wallace-Booth multiplier. - Liangyu Qian; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi; Jie Han 001 (ISCAS, 2016)

Design and Performance Evaluation of Approximate Floating-Point Multipliers. - Peipei Yin; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi (ISVLSI, 2016)

Design of approximate Redundant Binary multipliers. - Tian Cao 005; Weiqiang Liu 001; Chenghua Wang; Xiao-Ping Cui; Fabrizio Lombardi (NANOARCH, 2016)

A Reconfigurable Memory PUF Based on Tristate Inverter Arrays. - Yijun Cui; Chenghua Wang; Weiqiang Liu 001; Máire O'Neill (SiPS, 2016)

Design and Analysis of Inexact Floating-Point Adders. - Weiqiang Liu 001; Linbin Chen; Chenghua Wang; Máire O'Neill; Fabrizio Lombardi (IEEE Trans. Computers, 2016)

XOR gate based low-cost configurable RO PUF. - Lei Zhang 089; Chenghua Wang; Weiqiang Liu 001; Máire O'Neill; Fabrizio Lombardi (ISCAS, 2017)

Design of Approximate Radix-4 Booth Multipliers for Error-Tolerant Computing. - Weiqiang Liu 001; Liangyu Qian; Chenghua Wang; Honglan Jiang; Jie Han 001; Fabrizio Lombardi (IEEE Trans. Computers, 2017)

Attacking Arbiter PUFs Using Various Modeling Attack Algorithms: A Comparative Study. - Yue Fang; Chenghua Wang; Qingqing Ma; Chongyan Gu; Máire O'Neill; Weiqiang Liu 001 (APCCAS, 2018)

Combining Restoring Array and Logarithmic Dividers into an Approximate Hybrid Design. - Weiqiang Liu 001; Jing Li 117; Tao Xu; Chenghua Wang; Paolo Montuschi; Fabrizio Lombardi (ARITH, 2018)

A machine learning attack resistant multi-PUF design on FPGA. - Qingqing Ma; Chongyan Gu; Neil Hanley; Chenghua Wang; Weiqiang Liu 001; Máire O'Neill (ASP-DAC, 2018)

Design of Dynamic Range Approximate Logarithmic Multipliers. - Peipei Yin; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi (ACM Great Lakes Symposium on VLSI, 2018)

Design Exploration of Small Bit-Width Multipliers Using Approximate Logic Design (ALD) Tool. - Haroon Waris; Weiqiang Liu 001; Pengfei Huang; Ruizhe Ma; Chenghua Wang; Fabrizio Lombardi (DSP, 2018)

Design of Approximate FFT with Bit-width Selection Algorithms. - Qicong Liao; Weiqiang Liu 001; Fei Qiao; Chenghua Wang; Fabrizio Lombardi (ISCAS, 2018)

A Hardware/Software Co-design Method for Approximate Semi-Supervised K-Means Clustering. - Pengfei Huang; Chenghua Wang; Ruizhe Ma; Weiqiang Liu 001; Fabrizio Lombardi (ISVLSI, 2018)

A Highly Flexible Lightweight and High Speed True Random Number Generator on FPGA. - Faqiang Mei; Lei Zhang 089; Chongyan Gu; Yuan Cao; Chenghua Wang; Weiqiang Liu 001 (ISVLSI, 2018)

Ultra-Lightweight and Reconfigurable Tristate Inverter Based Physical Unclonable Function Design. - Yijun Cui; Chongyan Gu; Chenghua Wang; Máire O'Neill; Weiqiang Liu 001 (IEEE Access, 2018)

Design and Evaluation of Approximate Logarithmic Multipliers for Low Power Error-Tolerant Applications. - Weiqiang Liu 001; Jiahua Xu 001; Danye Wang; Chenghua Wang; Paolo Montuschi; Fabrizio Lombardi (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

Data Compression Device Based on Modified LZ4 Algorithm. - Weiqiang Liu 001; Faqiang Mei; Chenghua Wang; Máire O'Neill; Earl E. Swartzlander Jr. (IEEE Trans. Consumer Electron., 2018)

Designs of Approximate Floating-Point Multipliers with Variable Accuracy for Error-Tolerant Applications. - Peipei Yin; Chenghua Wang; Weiqiang Liu 001; Earl E. Swartzlander Jr.; Fabrizio Lombardi (J. Signal Process. Syst., 2018)

Theoretical Analysis of Delay-Based PUFs and Design Strategies for Improvement. - Yale Wang; Chenghua Wang; Chongyan Gu; Yijun Cui; Máire O'Neill; Weiqiang Liu 001 (ISCAS, 2019)

Dynamic Reconfigurable PUFs Based on FPGA. - Yijun Cui; Chenghua Wang; Yunpeng Chen; Ziwei Wei; Mengxian Chen; Weiqiang Liu 001 (SiPS, 2019)

Theoretical Analysis of Configurable RO PUFs and Strategies to Enhance Security. - Jiang Li 012; Hao Gao; Yijun Cui; Chenghua Wang; Yale Wang; Chongyan Gu; Weiqiang Liu 001 (SiPS, 2019)

Design and Evaluation of a Power-Efficient Approximate Systolic Array Architecture for Matrix Multiplication. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi (SiPS, 2019)

High-performance approximate half and full adder cells using NAND logic gate. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001 (IEICE Electron. Express, 2019)

Design and Analysis of Approximate Redundant Binary Multipliers. - Weiqiang Liu 001; Tian Cao 005; Peipei Yin; Yuying Zhu 003; Chenghua Wang; Earl E. Swartzlander Jr.; Fabrizio Lombardi (IEEE Trans. Computers, 2019)

Approximate Designs for Fast Fourier Transform (FFT) With Application to Speech Recognition. - Weiqiang Liu 001; Qicong Liao; Fei Qiao; Weijie Xia; Chenghua Wang; Fabrizio Lombardi (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

XOR-Based Low-Cost Reconfigurable PUFs for IoT Security. - Weiqiang Liu 001; Lei Zhang 089; Zhengran Zhang; Chongyan Gu; Chenghua Wang; Máire O'Neill; Fabrizio Lombardi (ACM Trans. Embed. Comput. Syst., 2019)

Security Analysis of Hardware Trojans on Approximate Circuits. - Yuqin Dou; Shichao Yu; Chongyan Gu; Máire O'Neill; Chenghua Wang; Weiqiang Liu 001 (ACM Great Lakes Symposium on VLSI, 2020)

Programmable Ring Oscillator PUF Based on Switch Matrix. - Yijun Cui; Yunpeng Chen; Chenghua Wang; Chongyan Gu; Máire O'Neill; Weiqiang Liu 001 (ISCAS, 2020)

AxMM: Area and Power Efficient Approximate Modular Multiplier for R-LWE Cryptosystem. - Dur-e-Shahwar Kundi; Song Bian 001; Ayesha Khalid; Chenghua Wang; Máire O'Neill; Weiqiang Liu 001 (ISCAS, 2020)

DC-LSTM: Deep Compressed LSTM with Low Bit-Width and Structured Matrices. - Guocai Nan; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi (ISCAS, 2020)

Transformer PUF : A Highly Flexible Configurable RO PUF Based on FPGA. - Ziwei Wei; Yijun Cui; Yunpeng Chen; Chenghua Wang; Chongyan Gu; Weiqiang Liu 001 (SiPS, 2020)

Resource-Shared Crypto-Coprocessor of AES Enc/Dec With SHA-3. - Dur-e-Shahwar Kundi; Ayesha Khalid; Arshad Aziz; Chenghua Wang; Máire O'Neill; Weiqiang Liu 001 (IEEE Trans. Circuits Syst., 2020)

Hybrid Low Radix Encoding-Based Approximate Booth Multipliers. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001 (IEEE Trans. Circuits Syst., 2020)

An Efficient and Parallel R-LWE Cryptoprocessor. - Yuqing Zhang; Chenghua Wang; Dur-e-Shahwar Kundi; Ayesha Khalid; Máire O'Neill; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

A 10-b 500MS/s Partially Loop-Unrolled SAR ADC with a Comparator Offset Calibration Technique. - Chao Chen; Jie Sun 020; Chenghua Wang; Weiqiang Liu 001 (ISCAS, 2021)

Towards CRYSTALS-Kyber: A M-LWE Cryptoprocessor with Area-Time Trade-Off. - Kan Yao; Dur-e-Shahwar Kundi; Chenghua Wang; Máire O'Neill; Weiqiang Liu 001 (ISCAS, 2021)

A Dynamic Highly Reliable SRAM-Based PUF Retaining Memory Function. - Hu Zhang; Chenghua Wang; Chenggang Yan 002; Yijun Cui; Chongyan Gu; Máire O'Neill; Weiqiang Liu 001 (ISCAS, 2021)

Dynamically Configurable Physical Unclonable Function based on RRAM Crossbar. - Jiang Li 012; Yijun Cui; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (NANOARCH, 2021)

A lightweight key renewal scheme based authentication protocol with configurable RO PUF for clustered sensor networks. - Yijun Cui; Jiang Li 012; Chenghua Wang; Chongyan Gu; Weiqiang Liu 001 (Microelectron. J., 2021)

A Hardware/Software Co-Design Methodology for Adaptive Approximate Computing in clustering and ANN Learning. - Pengfei Huang; Chenghua Wang; Weiqiang Liu 001; Fei Qiao; Fabrizio Lombardi (IEEE Open J. Comput. Soc., 2021)

Analog Circuit Soft Fault Diagnosis Based on Sparse Random Projections and K-Nearest Neighbor. - Jian Sun; Guobin Hu; Chenghua Wang (Sci. Program., 2021)

An Energy Efficient Accelerator for Bidirectional Recurrent Neural Networks (BiRNNs) Using Hybrid-Iterative Compression With Error Sensitivity. - Guocai Nan; Zhengkuan Wang; Chenghua Wang; Bi Wu; Zhican Wang; Weiqiang Liu 001; Fabrizio Lombardi (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

AxBMs: Approximate Radix-8 Booth Multipliers for High-Performance FPGA-Based Accelerators. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

Design and Analysis of Energy-Efficient Dynamic Range Approximate Logarithmic Multipliers for Machine Learning. - Peipei Yin; Chenghua Wang; Haroon Waris; Weiqiang Liu 001; Yinhe Han 001; Fabrizio Lombardi (IEEE Trans. Sustain. Comput., 2021)

AxSA: On the Design of High-Performance and Power-Efficient Approximate Systolic Arrays for Matrix Multiplication. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi (J. Signal Process. Syst., 2021)

An Automated Logic-Level Framework for Approximate Modular Arithmetic Circuits. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001 (Approximate Computing, 2022)

Lightweight and Efficient Hardware Implementation for Saber Using NTT Multiplication. - Tianyu Xu; Yijun Cui; Dongsheng Liu; Chenghua Wang; Weiqiang Liu 001 (APCCAS, 2022)

Design of Approximate Floating-point FFT with Mantissa Bit-width Adjustment Algorithm. - Xuan Zhao; Chenggang Yan 002; Chenghua Wang; Weiqiang Liu 001 (APCCAS, 2022)

A2TN: Aesthetic-Based Adversarial Transfer Network for Cross-Domain Recommendation. - Chenghua Wang; Yu Sang (APWeb/WAIM (3), 2022)

Recognizing the consciousness states of DOC patients by classifying EEG signal. - Junjie An; Chaoqun Weng; Chenghua Wang; Zhihua Huang (CISP-BMEI, 2022)

PAxC: A Probabilistic-oriented Approximate Computing Methodology for ANNs. - Pengfei Huang; Chenghua Wang; Ke Chen 018; Weiqiang Liu 001 (DATE, 2022)

Horizontal Correlation Analysis without Precise Location on Schoolbook Polynomial Multiplication of Lattice-based Cryptosystem. - Chuanchao Lu; Yijun Cui; Yang Li; Dur-e-Shahwar Kundi; Chenghua Wang; Weiqiang Liu 001 (ISCAS, 2022)

Architectural-Space Exploration of Energy-Efficient Approximate Arithmetic Units for Error-Tolerant Applications. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001 (ISVLSI, 2022)

HEADiv: A High-accuracy Energy-efficient Approximate Divider with Error Compensation. - Hanghang Wang; Ke Chen 018; Bi Wu; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi (NANOARCH, 2022)

A Novel Combined Correlation Power Analysis (CPA) Attack on Schoolbook Polynomial Multiplication in Lattice-based Cryptosystems. - Chuanchao Lu; Yijun Cui; Ayesha Khalid; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (SOCC, 2022)

TCAD Simulation of Single Event Transient in Si Bulk MOSFET at Cryogenic Temperature. - Tongshan Lu; Chenghua Wang (IEEE Access, 2022)

AxRLWE: A Multilevel Approximate Ring-LWE Co-Processor for Lightweight IoT Applications. - Dur-e-Shahwar Kundi; Ayesha Khalid; Song Bian 001; Chenghua Wang; Máire O'Neill; Weiqiang Liu 001 (IEEE Internet Things J., 2022)

Ultra High-Speed Polynomial Multiplications for Lattice-Based Cryptography on FPGAs. - Dur-e-Shahwar Kundi; Yuqing Zhang; Chenghua Wang; Ayesha Khalid; Máire O'Neill; Weiqiang Liu 001 (IEEE Trans. Emerg. Top. Comput., 2022)

Design of Unsigned Approximate Hybrid Dividers Based on Restoring Array and Logarithmic Dividers. - Weiqiang Liu 001; Tao Xu; Jing Li 117; Chenghua Wang; Paolo Montuschi; Fabrizio Lombardi (IEEE Trans. Emerg. Top. Comput., 2022)

A Dynamically Configurable PUF and Dynamic Matching Authentication Protocol. - Yale Wang; Chenghua Wang; Chongyan Gu; Yijun Cui; Máire O'Neill; Weiqiang Liu 001 (IEEE Trans. Emerg. Top. Comput., 2022)

Hybrid Partial Product-Based High-Performance Approximate Recursive Multipliers. - Haroon Waris; Chenghua Wang; Weiqiang Liu 001; Jie Han 001; Fabrizio Lombardi (IEEE Trans. Emerg. Top. Comput., 2022)

AxRMs: Approximate Recursive Multipliers Using High-Performance Building Blocks. - Haroon Waris; Chenghua Wang; Chenyu Xu; Weiqiang Liu 001 (IEEE Trans. Emerg. Top. Comput., 2022)

A Generic Dynamic Responding Mechanism and Secure Authentication Protocol for Strong PUFs. - Yale Wang; Chenghua Wang; Chongyan Gu; Yijun Cui; Máire O'Neill; Weiqiang Liu 001 (IEEE Trans. Very Large Scale Integr. Syst., 2022)

Deep Learning Based Low Complexity Symbol Detection and Modulation Classification Detector. - Chongzheng Hao; Xiaoyu Dang; Sai Li 004; Chenghua Wang (IEICE Trans. Commun., 2022)

An Efficient Hardware Accelerator of High-Speed NTT for CRYSTALS-Kyber Post-Quantum Cryptography. - Zhuoyao Zhang; Yijun Cui; Ziying Ni; Chenghua Wang; Weiqiang Liu 001 (ACSSC, 2023)

An Energy-efficient Approximate DCT Design for Image Processing (Invited). - Xu Wang; Ke Chen 018; Chenghua Wang; Weiqiang Liu 001 (ASICON, 2023)

Automated data set construction system for clinical EEG research. - Zexin Huang; Liyong Han; Zhihua Huang; Zhixiong Lin; Chenghua Wang (CISP-BMEI, 2023)

An EEG annotation system facilitating brain disease research. - Youwen Zhao; Zhixiong Lin; Chenghua Wang; Jie Li; Zhihua Huang (CISP-BMEI, 2023)

Novel Intrinsic Physical Unclonable Function Design for Post-quantum Cryptography. - Baosheng Wang; Yijun Cui; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (ISCAS, 2023)

A Novel Method Against Hardware Trojans in Approximate Circuits. - Yuqin Dou; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (ISQED, 2023)

A High Accuracy and Hardware Efficient Adaptive Filter Design with Approximate Computing. - Wenzhuo Xie; Chenggang Yan 002; Hanghang Wang; Ke Chen 018; Bi Wu; Chenghua Wang; Weiqiang Liu 001 (MWSCAS, 2023)

An RRAM-based PUF with Adjustable Programmable Voltage and Multi-Mode Operation. - Yijun Cui; Jiang Li 012; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (NANOARCH, 2023)

Security and Approximation: Vulnerabilities in Approximation-Aware Testing. - Yuqin Dou; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001; Fabrizio Lombardi (IEEE Trans. Emerg. Top. Comput., 2023)

Probability density function based data augmentation for deep neural network automatic modulation classification with limited training data. - Chongzheng Hao; Xiaoyu Dang; Xiangbin Yu 001; Sai Li 004; Chenghua Wang (IET Commun., 2023)

ENAP: An Efficient Number-Aware Pruning Framework for Design Space Exploration of Approximate Configurations. - Yuqin Dou; Chenghua Wang; Roger F. Woods; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

High-Throughput Polynomial Multiplier for Accelerating Saber on FPGA. - Yijun Cui; Yuantuo Zhang; Ziying Ni; Shichao Yu; Chenghua Wang; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Design of High Hardware Efficiency Approximate Floating-Point FFT Processor. - Chenggang Yan 002; Xuan Zhao; Tingting Zhang; Jipeng Ge; Chenghua Wang; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Graph contextualized self-attention network for software service sequential recommendation. - Zixuan Fu; Chenghua Wang; Jiajie Xu (Future Gener. Comput. Syst., 2023)

High Reliable Processor-Based PUF on Voltage Over-Scaling Technique. - Xinyuan Zhao; Yijun Cui; Fei Lyu 006; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (AsianHOST, 2024)

A Method of Selecting Negative Examples from Clinical EEG by Combining Ensemble Learning and Uncertainty Estimation. - Jianwen Liu; Liyong Han; Zexin Huang; Zhixiong Lin; Chenghua Wang; Zhihua Huang (CISP-BMEI, 2024)

A Concealable RRAM Physical Unclonable Function Compatible with In-Memory Computing. - Jiang Li 012; Yijun Cui; Chenghua Wang; Weiqiang Liu 001; Shahar Kvatinsky (DATE, 2024)

GATrojan: An Efficient Gate-level Hardware Trojan Detection Approach Using Graph Attention Networks. - Sen Wang; Yijun Cui; Shichao Yu; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (SOCC, 2024)

PhoneLM:an Efficient and Capable Small Language Model Family through Principled Pre-training. - Rongjie Yi; Xiang Li 067; Weikai Xie; Zhenyan Lu; Chenghua Wang; Ao Zhou 001; Shangguang Wang; Xiwen Zhang; Mengwei Xu (CoRR, 2024)

An Efficient Ring Oscillator PUF Using Programmable Delay Units on FPGA. - Yijun Cui; Jiang Li 012; Yunpeng Chen; Chenghua Wang; Chongyan Gu; Máire O'Neill; Weiqiang Liu 001 (ACM Trans. Design Autom. Electr. Syst., 2024)

Joint User Association and Power Control for Cell-Free Massive MIMO. - Chongzheng Hao; Tung Thanh Vu; Hien Quoc Ngo; Minh N. Dao; Xiaoyu Dang; Chenghua Wang; Michail Matthaiou (IEEE Internet Things J., 2024)

FPAX: A Fast Prior Knowledge-Based Framework for DSE in Approximate Configurations. - Yuqin Dou; Chenghua Wang; Haroon Waris; Roger F. Woods; Weiqiang Liu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Exploring Teaching Methods for Courses on Radiation Hardening Technology in ICs. - You Wang 002; Erya Deng; Yu Gong; Zhongkun Shen; Chenghua Wang; Yijun Cui; Weiqiang Liu 001 (ISCAS, 2025)

Ultra-compact and Side-channel Resistant Design of FIFO-based NTT Core for PQCs. - Jiatong Tian; Yijun Cui; Ziying Ni; Bei Wang; Fei Lyv; Chenghua Wang; Weiqiang Liu 001 (ISCAS, 2025)

Instruction-Based High-Performance Hardware Controller of CRYSTALS-Kyber With Balanced Resource Utilization. - Yijun Cui; Jiansheng Chen; Ziying Ni; Zhuoyao Zhang; Chenghua Wang; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

A 0.071pJ/Bit Flexible Multi-Mode Logic-Compatible Multiple-Time Programmable (MTP) Memory-Based PUF. - Yao Li 018; Yijun Cui; Shuming Guo; Jiang Li 012; Ruilin Zhang; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2025)

A Highly Reliable Dual-Mode RRAM PUF With Key Concealment Scheme. - Jiang Li 012; Yijun Cui; Chongyan Gu; Chenghua Wang; Weiqiang Liu 001; Shahar Kvatinsky (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

High-Performance Hardware Implementation of Crystals-Dilithium Based on Improved MDC-NTT. - Yijun Cui; Junjie Zhong; Bei Wang; Tianyu Xu; Chenghua Wang; Weiqiang Liu 001 (IEEE Trans. Computers, 2025)