Power-efficient instruction delivery through trace reuse. - Chengmo Yang; Alex Orailoglu (PACT, 2006)

Power efficient branch prediction through early identification of branch addresses. - Chengmo Yang; Alex Orailoglu (CASES, 2006)

Light-weight synchronization for inter-processor communication acceleration on embedded MPSoCs. - Chengmo Yang; Alex Orailoglu (CASES, 2007)

Predictable execution adaptivity through embedding dynamic reconfigurability into static MPSoC schedules. - Chengmo Yang; Alex Orailoglu (CODES+ISSS, 2007)

A light-weight cache-based fault detection and checkpointing scheme for MPSoCs enabling relaxed execution synchronization. - Chengmo Yang; Alex Orailoglu (CASES, 2008)

Squashing microcode stores to size in embedded systems while delivering rapid microcode accesses. - Chengmo Yang; Mingjing Chen; Alex Orailoglu (CODES+ISSS, 2009)

Towards no-cost adaptive MPSoC static schedules through exploitation of logical-to-physical core mapping latitude. - Chengmo Yang; Alex Orailoglu (DATE, 2009)

Processor reliability enhancement through compiler-directed register file peak temperature reduction. - Chengmo Yang; Alex Orailoglu (DSN, 2009)

Fully adaptive multicore architectures through statically-directed dynamic execution reconfigurations. - Chengmo Yang; Alex Orailoglu (VLSI-SoC, 2010)

Fine-grained adaptive CMP cache sharing through access history exploitation. - Chengmo Yang; Chun Jason Xue; Alex Orailoglu (VLSI-SoC, 2010)

Squashing code size in microcoded IPs while delivering high decompression speed. - Chengmo Yang; Mingjing Chen; Alex Orailoglu (Des. Autom. Embed. Syst., 2010)

Tackling computation uncertainty through fine-grained and predictable execution adaptivity in multicore systems. - Chengmo Yang (2010)

Frugal but flexible multicore topologies in support of resource variation-driven adaptivity. - Chengmo Yang; Alex Orailoglu (DATE, 2011)

ExLRU: a unified write buffer cache management for flash memory. - Liang Shi 001; Jianhua Li 003; Chun Jason Xue; Chengmo Yang; Xuehai Zhou (EMSOFT, 2011)

Exploiting set-level write non-uniformity for energy-efficient NVM-based hybrid cache. - Jianhua Li 003; Liang Shi 001; Chun Jason Xue; Chengmo Yang; Yinlong Xu (ESTIMedia, 2011)

Toward Future Systems with Nanoscale Devices: Overcoming the Reliability Challenge. - Wenjing Rao; Chengmo Yang; Ramesh Karri; Alex Orailoglu (Computer, 2011)

Migration-aware adaptive MPSoC static schedules with dynamic reconfigurability. - Yuping Zhang; Chun Jason Xue; Chengmo Yang; Alex Orailoglu (J. Parallel Distributed Comput., 2011)

Full Fault Resilience and Relaxed Synchronization Requirements at the Cache-Memory Interface. - Chengmo Yang; Alex Orailoglu (IEEE Trans. Very Large Scale Integr. Syst., 2011)

Write-activity-aware page table management for PCM-based embedded systems. - Tianzheng Wang 001; Duo Liu; Zili Shao; Chengmo Yang (ASP-DAC, 2012)

Tackling Resource Variations Through Adaptive Multicore Execution Frameworks. - Chengmo Yang; Alex Orailoglu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012)

Fault detection and recovery efficiency co-optimization through compile-time analysis and runtime adaptation. - Hao Chen; Chengmo Yang (CASES, 2013)

Boosting efficiency of fault detection and recovery throughapplication-specific comparison and checkpointing. - Hao Chen; Chengmo Yang (LCTES, 2013)

Leveraging microarchitectural side channel information to efficiently enhance program control flow integrity. - Chen Liu 013; Chengmo Yang; Yuanqi Shen (CODES+ISSS, 2014)

3M-PCM: Exploiting multiple write modes MLC phase change main memory in embedded systems. - Chen Pan; Mimi Xie; Jingtong Hu; Yiran Chen 001; Chengmo Yang (CODES+ISSS, 2014)

Exploiting heterogeneity in MPSoCs to prevent potential trojan propagation across malicious IPs. - Chen Liu 013; Chengmo Yang (ACM Great Lakes Symposium on VLSI, 2014)

Improving multilevel PCM reliability through age-aware reading and writing strategies. - Chen Liu 013; Chengmo Yang (ICCD, 2014)

Leveling to the last mile: Near-zero-cost bit level wear leveling for PCM-based main memory. - Mengying Zhao; Liang Shi 001; Chengmo Yang; Chun Jason Xue (ICCD, 2014)

Prolonging PCM lifetime through energy-efficient, segment-aware, and wear-resistant page allocation. - Hoda Aghaei Khouzani; Yuan Xue; Chengmo Yang; Archana Pandurangi (ISLPED, 2014)

Shielding Heterogeneous MPSoCs From Untrustworthy 3PIPs Through Security- Driven Task Scheduling. - Chen Liu 013; Jeyavijayan Rajendran; Chengmo Yang; Ramesh Karri (IEEE Trans. Emerg. Top. Comput., 2014)

A Unified Write Buffer Cache Management Scheme for Flash Memory. - Liang Shi 001; Jianhua Li 003; Qing'an Li; Chun Jason Xue; Chengmo Yang; Xuehai Zhou (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Guiding fault-driven adaption in multicore systems through a reliability-aware static task schedule. - Laura A. Rozo Duque; Chengmo Yang (ASP-DAC, 2015)

Improving performance and lifetime of DRAM-PCM hybrid main memory through a proactive page allocation strategy. - Hoda Aghaei Khouzani; Chengmo Yang; Jingtong Hu (ASP-DAC, 2015)

Checkpoint-aware instruction scheduling for nonvolatile processor with multiple functional units. - Mimi Xie; Chen Pan; Jingtong Hu; Chengmo Yang; Yiran Chen 001 (ASP-DAC, 2015)

Minimizing MLC PCM write energy for free through profiling-based state remapping. - Mengying Zhao; Yuan Xue; Chengmo Yang; Chun Jason Xue (ASP-DAC, 2015)

Improving MPSoC reliability through adapting runtime task schedule based on time-correlated fault behavior. - Laura A. Rozo Duque; Jose Manuel Monsalve Diaz; Chengmo Yang (DATE, 2015)

Nonvolatile main memory aware garbage collection in high-level language virtual machine. - Chen Pan; Mimi Xie; Chengmo Yang; Zili Shao; Jingtong Hu (EMSOFT, 2015)

Fine-tuning CLB placement to speed up reconfigurations in NVM-based FPGAs. - Yuan Xue; Patrick Cronin; Chengmo Yang; Jingtong Hu (FPL, 2015)

Secure and Durable (SEDURA): An Integrated Encryption and Wear-leveling Framework for PCM-based Main Memory. - Chen Liu 013; Chengmo Yang (LCTES, 2015)

Non-volatile memories in FPGAs: Exploiting logic similarity to accelerate reconfiguration and increase programming cycles. - Yuan Xue; Patrick Cronin; Chengmo Yang; Jingtong Hu (VLSI-SoC, 2015)

Qualifying non-volatile register files for embedded systems through compiler-directed write minimization and balancing. - Chengmo Yang; Maria Ruiz Varela (VLSI-SoC, 2015)

A mutual auditing framework to protect IoT against hardware Trojans. - Chen Liu 013; Patrick Cronin; Chengmo Yang (ASP-DAC, 2016)

Routing path reuse maximization for efficient NV-FPGA reconfiguration. - Yuan Xue; Patrick Cronin; Chengmo Yang; Jingtong Hu (ASP-DAC, 2016)

Towards a Scalable and Write-Free Multi-version Checkpointing Scheme in Solid State Drives. - Hoda Aghaei Khouzani; Chengmo Yang (DSN, 2016)

Fully Exploiting PCM Write Capacity Within Near Zero Cost Through Segment-Based Page Allocation. - Hoda Aghaei Khouzani; Yuan Xue; Chengmo Yang (ACM J. Emerg. Technol. Comput. Syst., 2016)

'The danger of sleeping', an exploration of security in non-volatile processors. - Patrick Cronin; Chengmo Yang; Dongqin Zhou; Keni Qiu; Xin Shi; Yongpan Liu (AsianHOST, 2017)

Leveraging Compiler Optimizations to Reduce Runtime Fault Recovery Overhead. - Fateme S. Hosseini; Pouya Fotouhi; Chengmo Yang; Guang R. Gao (DAC, 2017)

Age-aware Logic and Memory Co-Placement for RRAM-FPGAs. - Yuan Xue; Chengmo Yang; Jingtong Hu (DAC, 2017)

Leveraging access port positions to accelerate page table walk in DWM-based main memory. - Hoda Aghaei Khouzani; Pouya Fotouhi; Chengmo Yang; Guang R. Gao (DATE, 2017)

CooECC: A Cooperative Error Correction Scheme to Reduce LDPC Decoding Latency in NAND Flash. - Meng Zhang 014; Fei Wu 005; Yajuan Du; Chengmo Yang; Changsheng Xie; Jiguang Wan 001 (ICCD, 2017)

Improving read performance via selective Vpass reduction on high density 3D NAND flash memory. - Qiao Li 001; Liang Shi 001; Yejia Di; Yajuan Du; Chun Jason Xue; Chengmo Yang; Qingfeng Zhuge; Edwin Hsing-Mean Sha (NVMSA, 2017)

Power-aware and cost-efficient state encoding in non-volatile memory based FPGAs. - Yuan Xue; Abraham Mcllvaine; Chengmo Yang (VLSI-SoC, 2017)

Path reuse-aware routing for non-volatile memory based FPGAs. - Yuan Xue; Chengmo Yang (Integr., 2017)

ErasuCrypto: A Light-weight Secure Data Deletion Scheme for Solid State Drives. - Chen Liu 013; Hoda Aghaei Khouzani; Chengmo Yang (Proc. Priv. Enhancing Technol., 2017)

Segment and Conflict Aware Page Allocation and Migration in DRAM-PCM Hybrid Main Memory. - Hoda Aghaei Khouzani; Fateme S. Hosseini; Chengmo Yang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

State Asymmetry Driven State Remapping in Phase Change Memory. - Mengying Zhao; Yuan Xue; Jingtong Hu; Chengmo Yang; Tiantian Liu 001; Zhiping Jia; Chun Jason Xue (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

A DWM-Based Stack Architecture Implementation for Energy Harvesting Systems. - Hoda Aghaei Khouzani; Chengmo Yang (ACM Trans. Embed. Comput. Syst., 2017)

Exploiting Multiple Write Modes of Nonvolatile Main Memory in Embedded Systems. - Chen Pan; Mimi Xie; Chengmo Yang; Yiran Chen 001; Jingtong Hu (ACM Trans. Embed. Comput. Syst., 2017)

State-Transition-Aware Spilling Heuristic for MLC STT-RAM-Based Registers. - Yuanhui Ni; Zhiyao Gong; Weiwen Chen; Chengmo Yang; Keni Qiu (VLSI Design, 2017)

Performance analysis on structure of racetrack memory. - Hongbin Zhang; Chao Zhang; Qingda Hu; Chengmo Yang; Jiwu Shu (ASP-DAC, 2018)

FastGC: accelerate garbage collection via an efficient copyback-based data migration in SSDs. - Fei Wu 005; Jiaona Zhou; Shunzhuo Wang; Yajuan Du; Chengmo Yang; Changsheng Xie (DAC, 2018)

A collaborative defense against wear out attacks in non-volatile processors. - Patrick Cronin; Chengmo Yang; Yongpan Liu (DAC, 2018)

Lowering the barrier to online malware detection through low frequency sampling of HPCs. - Patrick Cronin; Chengmo Yang (HOST, 2018)

Architecting data placement in SSDs for efficient secure deletion implementation. - Hoda Aghaei Khouzani; Chen Liu 013; Chengmo Yang (ICCAD, 2018)

Reliability and Security in Non-volatile Processors, Two Sides of the Same Coin. - Patrick Cronin; Chengmo Yang; Yongpan Liu (ISVLSI, 2018)

Low Overhead Online Checkpoint for Intermittently Powered Non-volatile FPGAs. - Xinyi Zhang 001; Clay Patterson; Yongpan Liu; Chengmo Yang; Chun Jason Xue; Jingtong Hu (ISVLSI, 2018)

A Low Overhead Solution to Resilient Assembly Lines Built From Legacy Controllers. - Patrick Cronin; Fateme S. Hosseini; Chengmo Yang (IEEE Embed. Syst. Lett., 2018)

Power- and Endurance-Aware Neural Network Training in NVM-Based Platforms. - Fanruo Meng; Yuan Xue; Chengmo Yang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Reliability-Aware Runtime Adaption Through a Statically Generated Task Schedule. - Laura Rozo; Aaron Myles Landwehr; Yan Zheng; Chengmo Yang; Guang Gao (IEEE Trans. Very Large Scale Integr. Syst., 2018)

A Fault-Tolerant Neural Network Architecture. - Tao Liu 023; Wujie Wen; Lei Jiang 001; Yanzhi Wang; Chengmo Yang; Gang Quan (DAC, 2019)

WAS: Wear Aware Superblock Management for Prolonging SSD Lifetime. - Shunzhuo Wang; Fei Wu 005; Chengmo Yang; Jiaona Zhou; Changsheng Xie; Jiguang Wan 001 (DAC, 2019)

Compiler-Directed and Architecture-Independent Mitigation of Read Disturbance Errors in STT-RAM. - Fateme S. Hosseini; Chengmo Yang (DATE, 2019)

Tuning Track-based NVM Caches for Low-Power IoT Devices. - Hoda Aghaei Khouzani; Chengmo Yang (ACM Great Lakes Symposium on VLSI, 2019)

A Processing-In-Memory Implementation of SHA-3 Using a Voltage-Gated Spin Hall-Effect Driven MTJ-based Crossbar. - Chengmo Yang; Zeyu Chen (ACM Great Lakes Symposium on VLSI, 2019)

A Scalable and Process Variation Aware NVM-FPGA Placement Algorithm. - Chengmo Yang; Yuan Xue (ACM Great Lakes Symposium on VLSI, 2019)

A Fetching Tale: Covert Communication with the Hardware Prefetcher. - Patrick Cronin; Chengmo Yang (HOST, 2019)

Detecting Gas Vapor Leaks through Uncalibrated Sensor Based CPS. - Diaa Badawi; Sule Ozev; Jennifer Blain Christen; Chengmo Yang; Alex Orailoglu; A. Enis Çetin (ICASSP, 2019)

Covert Data Exfiltration Using Light and Power Channels. - Patrick Cronin; Charles Gouert; Dimitris Mouris; Nektarios Georgios Tsoutsos; Chengmo Yang (ICCD, 2019)

Comprehensive Evaluation of Program Reliability with ComFIDet: An Integrated Fault Injection and Detection Framework for Embedded Systems. - Fateme S. Hosseini; Chengmo Yang (ICESS, 2019)

Detecting Gas Vapor Leaks Using Uncalibrated Sensors. - Diaa Badawi; Tuba Ayhan; Sule Ozev; Chengmo Yang; Alex Orailoglu; Ahmet Enis Çetin (IEEE Access, 2019)

A 3.77TOPS/W Convolutional Neural Network Processor With Priority-Driven Kernel Optimization. - Jinshan Yue; Yongpan Liu; Zhe Yuan; Zhibo Wang 004; Qingwei Guo; Jinyang Li 002; Chengmo Yang; Huazhong Yang (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

Monitoring the Health of Emerging Neural Network Accelerators with Cost-effective Concurrent Test. - Qi Liu 017; Tao Liu 023; Zihao Liu; Wujie Wen; Chengmo Yang (DAC, 2020)

A Crowd-Based Explosive Detection System with Two-Level Feedback Sensor Calibration. - Chengmo Yang; Patrick Cronin; Agamyrat Agambayev; Sule Ozev; A. Enis Çetin; Alex Orailoglu (ICCAD, 2020)

Trustworthy AI Inference Systems: An Industry Research View. - Rosario Cammarota; Matthias Schunter; Anand Rajan; Fabian Boemer; Ágnes Kiss; Amos Treiber; Christian Weinert; Thomas Schneider 003; Emmanuel Stapf; Ahmad-Reza Sadeghi; Daniel Demmler; Huili Chen; et al. (CoRR, 2020)

Low Overhead Online Data Flow Tracking for Intermittently Powered Non-Volatile FPGAs. - Xinyi Zhang 001; Clay Patterson; Yongpan Liu; Chengmo Yang; Chun Jason Xue; Jingtong Hu (ACM J. Emerg. Technol. Comput. Syst., 2020)

Securing Cyber-Physical Systems from Hardware Trojan Collusion. - Chen Liu 013; Patrick Cronin; Chengmo Yang (IEEE Trans. Emerg. Top. Comput., 2020)

A Self-Test Framework for Detecting Fault-induced Accuracy Drop in Neural Network Accelerators. - Fanruo Meng; Fateme S. Hosseini; Chengmo Yang (ASP-DAC, 2021)

Modeling of Threshold Voltage Distribution in 3D NAND Flash Memory. - Weihua Liu; Fei Wu 005; Jian Zhou 004; Meng Zhang 014; Chengmo Yang; Zhonghai Lu; Yu Wang 168; Changsheng Xie (DATE, 2021)

Safeguarding the Intelligence of Neural Networks with Built-in Light-weight Integrity MArks (LIMA). - Fateme S. Hosseini; Qi Liu 017; Fanruo Meng; Chengmo Yang; Wujie Wen (HOST, 2021)

Charger-Surfing: Exploiting a Power Line Side-Channel for Smartphone Information Leakage. - Patrick Cronin; Xing Gao 001; Chengmo Yang; Haining Wang 001 (USENIX Security Symposium, 2021)

A Compile-Time Framework for Tolerating Read Disturbance in STT-RAM. - Fateme S. Hosseini; Chengmo Yang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

DEPS: Exploiting a Dynamic Error Prechecking Scheme to Improve the Read Performance of SSD. - Weihua Liu; Fei Wu 005; Meng Zhang 014; Chengmo Yang; Zhonghai Lu; Jiguang Wan 001; Changsheng Xie (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Tolerating Defects in Low-Power Neural Network Accelerators Via Retraining-Free Weight Approximation. - Fateme S. Hosseini; Fanruo Meng; Chengmo Yang; Wujie Wen; Rosario Cammarota (ACM Trans. Embed. Comput. Syst., 2021)

Defense Against Hardware Trojan Collusion in MPSoCs. - Chen Liu 013; Chengmo Yang (Behavioral Synthesis for Hardware Security, 2022)

Exploring Image Selection for Self-Testing in Neural Network Accelerators. - Fanruo Meng; Chengmo Yang (ISVLSI, 2022)

FHE-Booster: Accelerating Fully Homomorphic Execution with Fine-tuned Bootstrapping Scheduling. - Tommy White; Charles Gouert; Chengmo Yang; Nektarios Georgios Tsoutsos (HOST, 2023)

NeuroPots: Realtime Proactive Defense against Bit-Flip Attacks in Neural Networks. - Qi Liu 017; Jieming Yin; Wujie Wen; Chengmo Yang; Shi Sha (USENIX Security Symposium, 2023)

Derailed: Arbitrarily Controlling DNN Outputs with Targeted Fault Injection Attacks. - Jhon Ordoñez; Chengmo Yang (DATE, 2024)

Enhancing DNN Accelerator Integrity via Selective and Permuted Recomputation. - Jhon Ordoñez; Chengmo Yang (ICCAD, 2024)

Key-Recovery Attack on Enhanced PSLL Techniques. - Saeid Rajabi; Chengmo Yang; Satwik Patnaik (IEEE Embed. Syst. Lett., 2025)