A reconfigurable floating-point FFT architecture. - Chenlu Wu; Wei Cao 002; Xuegong Zhou; Lingli Wang; Fang Wang; Baodi Yuan (ASICON, 2013)

Implementation of high performance hardware architecture of OpenSURF algorithm on FPGA. - Xitian Fan; Chenlu Wu; Wei Cao 002; Xuegong Zhou; Shengye Wang; Lingli Wang (FPT, 2013)

An FPGA-cluster-accelerated match engine for content-based image retrieval. - Chen Liang; Chenlu Wu; Xuegong Zhou; Wei Cao 002; Shengye Wang; Lingli Wang (FPT, 2013)

A hardware implementation of Bag of Words and Simhash for image recognition. - Shengye Wang; Chen Liang; Xuegong Zhou; Wei Cao 002; Chenlu Wu; Xitian Fan; Lingli Wang (FPT, 2013)

PathAFL: Path-Coverage Assisted Fuzzing. - Shengbo Yan; Chenlu Wu; Hang Li; Wei Shao; Chunfu Jia (AsiaCCS, 2020)