IC defect sensitivity for footprint-type spot defects. - José Pineda de Gyvez; Chennian Di (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992)

Fast Multi-Layer Critical Area Computation. - Hua Xue; Chennian Di; Jochen A. G. Jess (DFT, 1993)

A net-oriented method for realistic fault analysis. - Hua Xue; Chennian Di; Jochen A. G. Jess (ICCAD, 1993)

On Accurate Modeling and Efficient Simulation of CMOS Opens. - Chennian Di; Jochen A. G. Jess (ITC, 1993)

On CMOS bridge fault modeling and test pattern evaluation. - Chennian Di; Jochen A. G. Jess (VTS, 1993)

Probability Analysis for CMOS Floating Gate Faults. - Hua Xue; Chennian Di; Jochen A. G. Jess (EDAC-ETC-EUROASIC, 1994)

An efficient CMOS bridging fault simulator: with SPICE accuracy. - Chennian Di; Jochen A. G. Jess (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996)

Adapting an industrial memory BIST solution for testing CAMs. - Jais Abraham; Uttam Garg; Glenn Colón-Bonet; Ramesh Sharma; Chennian Di; Benoit Nadeau-Dostie; Etienne Racine; Martin Keim (ITC-Asia, 2017)