An area-efficient implementation of ΣΔ ADC multistage decimation filter. - Chenxi Deng (ASICON, 2013)

A 1.8-V 12-bit self-calibrating SAR ADC with a novel comparator. - Chenxi Deng; Long Zhao; Hui Zheng; Yuhua Cheng (ASICON, 2015)

A 6b 2b/cycle SAR ADC beyond 1GS/s with hybrid DAC structure and low kickback noise comparators. - Long Zhao; Chenxi Deng; Yuhua Cheng (ASICON, 2015)

A 1-V 23-μW 88-dB DR Sigma-Delta ADC for high-accuracy and low-power applications. - Long Zhao; Chenxi Deng; Hongming Chen 002; Guan Wang; Yuhua Cheng (ASICON, 2015)

A 1.1V 12μW 86dB DR Sigma-Delta Modulator for Health Monitoring System. - Long Zhao; Chenxi Deng; Guan Wang; Hongming Chen 002; Yuhua Cheng (J. Circuits Syst. Comput., 2016)

Leveraging AI technology for distinguishing Eucommiae Cortex processing levels and evaluating anti-fatigue potential. - Yijing Pan; Shunshun Wang; Kehong Ming; Xinyue Liu; Huiming Yu; Qianqian Du; Chenxi Deng; Qingjia Chi; Xianqiong Liu; Chunli Wang; Kang Xu (Comput. Biol. Medicine, 2025)

A hierarchical progressive recognition network for building change detection in high-resolution remote sensing images. - Zhihuan Liu; Zaichun Yang; Tingting Ren; Zhenzhen Wang; JinSheng Deng; Chenxi Deng; Hongmin Zhao; Guoxiong Zhou; Aibin Chen; Liujun Li (Comput. Aided Civ. Infrastructure Eng., 2025)