Pole-Converging Intrastage Bandwidth Extension Technique for Wideband Amplifiers. - Guangyin Feng; Chirn Chye Boon; Fanyi Meng; Xiang Yi; Kaituo Yang; Chenyang Li 008; Howard C. Luong (IEEE J. Solid State Circuits, 2017)

D-Band Surface-Wave Modulator and Signal Source with 40 dB Extinction Ratio and 3.7mW Output Power in 65 nm CMOS. - Yuan Liang 004; Hao Yu 001; Chirn Chye Boon; Chenyang Li 008; Dietmar Kissinger; Yong Wang (ESSCIRC, 2018)

A 24/77 GHz Dual-Band Receiver for Automotive Radar Applications. - Xiang Yi; Guangyin Feng; Zhipeng Liang; Cheng Wang 009; Bei Liu; Chenyang Li 008; Kaituo Yang; Chirn Chye Boon; Quan Xue (IEEE Access, 2019)

A Low-Noise, Positive-Input, Negative-Output Voltage Generator for Low-to-Moderate Driving Capacity Applications. - Devrishi Khanna; Chirn Chye Boon; Pilsoon Choi; Liter Siek; Bei Liu; Chenyang Li 008 (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A 0.044-mm2 0.5-to-7-GHz Resistor-Plus-Source-Follower-Feedback Noise-Cancelling LNA Achieving a Flat NF of 3.3±0.45 dB. - Haohong Yu; Yong Chen 005; Chirn Chye Boon; Chenyang Li 008; Pui-In Mak; Rui Paulo Martins (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

Design and Analysis of $D$ -Band On-Chip Modulator and Signal Source Based on Split-Ring Resonator. - Yuan Liang 004; Chirn Chye Boon; Chenyang Li 008; Xiao-Lan Tang; Herman Jalli Ng; Dietmar Kissinger; Yong Wang; Qingfeng Zhang; Hao Yu 001 (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Multi-Channel FSK Inter/Intra-Chip Communication by Exploiting Field-Confined Slow-Wave Transmission Line. - Qian Chen 027; Chirn Chye Boon; Xueyong Zhang; Chenyang Li 008; Yuan Liang 004; Zhe Liu 038; Ting Guo (ISCAS, 2020)

Compact Switched-Capacitor Power Detector With Frequency Compensation in 65-nm CMOS. - Chenyang Li 008; Chirn Chye Boon; Xiang Yi; Zhipeng Liang; Kaituo Yang (IEEE Access, 2020)

Design of a Wideband Variable-Gain Amplifier With Self-Compensated Transistor for Accurate dB-Linear Characteristic in 65 nm CMOS Technology. - Lingshan Kong; Hang Liu 006; Xi Zhu 001; Chirn Chye Boon; Chenyang Li 008; Zhe Liu 038; Kiat Seng Yeo (IEEE Trans. Circuits Syst., 2020)

A 1.75dB-NF 25mW 5GHz Transformer-Based Noise- Cancelling CMOS Receiver Front-End. - Kaituo Yang; Chirn Chye Boon; Guangyin Feng; Chenyang Li 008; Zhe Liu 038; Ting Guo; Xiang Yi; Yangtao Dong; Ao Zhou 003; Xiaoying Wang (ISSCC, 2021)

A Parallel Sliding-IF Receiver Front-End With Sub-2-dB Noise Figure for 5-6-GHz WLAN Carrier Aggregation. - Kaituo Yang; Xiang Yi; Chirn Chye Boon; Zhipeng Liang; Guangyin Feng; Chenyang Li 008; Bei Liu (IEEE J. Solid State Circuits, 2021)

A Bidirectional Nonlinearly Coupled QVCO With Passive Phase Interpolation for Multiphase Signals Generation. - Yangtao Dong; Chirn Chye Boon; Xin Ding 003; Chenyang Li 008; Zhe Liu 038 (IEEE Trans. Very Large Scale Integr. Syst., 2021)

A 0.0078mm2 3.4mW Wideband Positive-feedback-Based Noise-Cancelling LNA in 28nm CMOS Exploiting Gm Boosting. - Zhe Liu 038; Chirn Chye Boon; Chenyang Li 008; Kaituo Yang; Yangtao Dong; Ting Guo (ISSCC, 2022)

A Hybrid Coupler-First 5GHz Noise-Cancelling Dual-Mode Receiver with +10dBm in-Band IIP3 in Current-Mode and 1.7dB NF in Voltage-Mode. - Kaituo Yang; Chirn Chye Boon; Zhe Liu 038; Jiaming Piao; Ting Guo; Yangtao Dong; Chenyang Li 008; Ao Zhou 003; Zhijie Yang; Xiaoying Wang; Yufeng Liu (ISSCC, 2022)

Review of recent progress on solid-state millimeter-wave and terahertz signal sources. - Yiqian Shan; Yuan Liang 004; Chenyang Li 008; Weifeng Sun; Zhongyuan Fang (Int. J. Circuit Theory Appl., 2024)