A local dynamic method for tracking communities and their evolution in dynamic networks. - Yanmei Hu; Bo Yang 011; Chenyang Lv (Knowl. Based Syst., 2016)

SmartSeed: Smart Seed Generation for Efficient Fuzzing. - Chenyang Lv; Shouling Ji; Yuwei Li; Junfeng Zhou; Jianhai Chen; Pan Zhou 001; Jing Chen 003 (CoRR, 2018)

V-Fuzz: Vulnerability-Oriented Evolutionary Fuzzing. - Yuwei Li; Shouling Ji; Chenyang Lv; Yuan Chen; Jianhai Chen; Qinchen Gu; Chunming Wu 001 (CoRR, 2019)

Cross-layer Designs against Non-ideal Effects in ReRAM-based Processing-in-Memory System. - Chen Nie; Zongwu Wang; Qidong Tang; Chenyang Lv; Li Jiang 002; Zhezhi He (ISQED, 2022)

A Cloud-Side Task Scheduling Algorithm with Multiple Evaluation Metrics. - Yong Ma; Xinghong Jiang; Chenyang Lv; Tao Tao; Liang Zhou; Qilin Xie; Lingguo Zhen (MONAMI, 2022)

An Encrypted Abnormal Stream Detection Method Based on Improved Skyline Computation. - Xinghong Jiang; Xuan Li; Chenyang Lv; Yong Ma; Yulong Shen; Meibin He; Guozheng Li (NaNA, 2022)

Volume rendering based on PBR and neural implicit surfaces. - Chenyang Lv; Yigang Wang (EITCE, 2023)

XMG-GPPIC: Efficient and Robust General-Purpose Processing-in-Cache with XOR-Majority-Graph. - Chen Nie; Xianjue Cai; Chenyang Lv; Chen Huang; Weikang Qian; Zhezhi He (ACM Great Lakes Symposium on VLSI, 2023)

GPT-LS: Generative Pre-Trained Transformer with Offline Reinforcement Learning for Logic Synthesis. - Chenyang Lv; Ziling Wei; Weikang Qian; Junjie Ye; Chang Feng; Zhezhi He (ICCD, 2023)

Integrating Social Value Orientation and Motion Safety Controller in Autonomous Driving: Improving the Safety of Unprotected Left-Turn Behaviour. - Chuancheng Zhang; Zhenhao Wang; Chenyang Lv; Yanhao Cui; Bin Jiang; Qiang Guo (ITSC, 2024)

High-Quality Iterative Logic Compiler for In-Memory SIMD Computation with Tight Coupling of Synthesis and Scheduling. - Xingyue Qian; Chenyang Lv; Zhezhi He; Weikang Qian (CoRR, 2024)

VSPIM: SRAM Processing-in-Memory DNN Acceleration via Vector-Scalar Operations. - Chen Nie; Chenyu Tang; Jie Lin 004; Huan Hu; Chenyang Lv; Ting Cao; Weifeng Zhang 003; Li Jiang 002; Xiaoyao Liang; Weikang Qian; Yanan Sun 003; Zhezhi He (IEEE Trans. Computers, 2024)

HaVen: Hallucination-Mitigated LLM for Verilog Code Generation Aligned with HDL Engineers. - Yiyao Yang; Fu Teng; Pengju Liu; Mengnan Qi; Chenyang Lv; Ji Li; Xuhong Zhang 002; Zhezhi He (DATE, 2025)

A Survey of DDoS Attack and Defense Technologies in Multiaccess Edge Computing. - Yong Ma; Long Liu; Zhiquan Liu; Fagen Li; Qilin Xie; Kaiwei Chen; Chenyang Lv; Ying He 006; Fan Li (IEEE Internet Things J., 2025)

A Recursive Partition-Based In-Memory SIMD Computation Scheduler for Memory Footprint Minimization. - Xingyue Qian; Chenyang Lv; Zhezhi He; Weikang Qian (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)