Intra-array Non-Idealities Modeling and Algorithm Optimization for RRAM-based Computing-in-Memory Applications. - Chenyang Zhao 008; Jinbei Fang; Jingwen Jiang; Zhiwang Guo; Xiaoyong Xue; Xiaoyang Zeng (ASICON, 2021)

An Energy Efficient Computing-in-Memory Accelerator With 1T2R Cell and Fully Analog Processing for Edge AI Applications. - Keji Zhou; Chenyang Zhao 008; Jinbei Fang; Jingwen Jiang; Deyang Chen; Yujie Huang; Ming-e Jing; Jun Han 003; Haidong Tian; Xiankui Xiong; Qi Liu 010; Xiaoyong Xue; et al. (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A 28 nm 81 Kb 59-95.3 TOPS/W 4T2R ReRAM Computing-in-Memory Accelerator With Voltage-to-Time-to-Digital Based Output. - Keji Zhou; Xinru Jia; Chenyang Zhao 008; Xumeng Zhang; Guangjian Wu; Chen Mu; Haozhe Zhu; Yanting Ding; Chixiao Chen; Xiaoyong Xue; Xiaoyang Zeng; Qi Liu 010 (IEEE J. Emerg. Sel. Topics Circuits Syst., 2022)

A 1T2R1C ReRAM CIM Accelerator With Energy-Efficient Voltage Division and Capacitive Coupling for CNN Acceleration in AI Edge Applications. - Deyang Chen; Zhiwang Guo; Jinbei Fang; Chenyang Zhao 008; Jingwen Jiang; Keji Zhou; Haidong Tian; Xiankui Xiong; Xiaoyong Xue; Xiaoyang Zeng (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

ARBiS: A Hardware-Efficient SRAM CIM CNN Accelerator With Cyclic-Shift Weight Duplication and Parasitic-Capacitance Charge Sharing for AI Edge Application. - Chenyang Zhao 008; Jinbei Fang; Jingwen Jiang; Xiaoyong Xue; Xiaoyang Zeng (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

An Emerging NVM CIM Accelerator With Shared-Path Transpose Read and Bit-Interleaving Weight Storage for Efficient On-Chip Training in Edge Devices. - Zhiwang Guo; Deyang Chen; Chenyang Zhao 008; Jinbei Fang; Jingwen Jiang; Yixuan Liu; Haidong Tian; Xiankui Xiong; Keji Zhou; Xiaoyong Xue; Qi Liu 010; Xiaoyang Zeng (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Tempo-CIM: A RRAM Compute-in-Memory Neuromorphic Accelerator With Area-Efficient LIF Neuron and Split-Train-Merged-Inference Algorithm for Edge AI Applications. - Jingwen Jiang; Keji Zhou; Jinhao Liang; Fengshi Tian; Chenyang Zhao 008; Jianguo Yang; Xiaoyong Xue; Xiaoyang Zeng (IEEE J. Emerg. Sel. Topics Circuits Syst., 2023)

A Heuristic and Greedy Weight Remapping Scheme with Hardware Optimization for Irregular Sparse Neural Networks Implemented on CIM Accelerator in Edge AI Applications. - Lizhou Wu; Chenyang Zhao 008; Jingbo Wang; Xueru Yu; Shoumian Chen; Chen Li; Jun Han 003; Xiaoyong Xue; Xiaoyang Zeng (ASPDAC, 2024)

A 28-nm 36 Kb SRAM CIM Engine With 0.173 μm2 4T1T Cell and Self-Load-0 Weight Update for AI Inference and Training Applications. - Chenyang Zhao 008; Jinbei Fang; Xiaoli Huang; Deyang Chen; Zhiwang Guo; Jingwen Jiang; Jiawei Wang; Jianguo Yang; Jun Han 003; Peng Zhou 021; Xiaoyong Xue; Xiaoyang Zeng (IEEE J. Solid State Circuits, 2024)

Light-CIM: A Lightweight ADC/DAC-Fewer RRAM CIM DNN Accelerator With Fully Analog Tiles and Nonideality-Aware Algorithm for Consumer Electronics. - Chenyang Zhao 008; Jinbei Fang; Jingwen Jiang; Xiaoyong Xue; Xiaoyang Zeng (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)