A 1.2 TB/s on-chip ring interconnect for 45nm 8-core enterprise Xeon® processor. - Cheolmin Park; Roy W. Badeau; Larry L. Biro; Jonathan Chang; Tejpal Singh; Jim Vash; Bo Wang; Tom Wang (ISSCC, 2010)

A 32 nm, 3.1 Billion Transistor, 12 Wide Issue Itanium® Processor for Mission-Critical Servers. - Reid J. Riedlinger; Ron Arnold; Larry L. Biro; William J. Bowhill; Jason Crop; Kevin Duda; Eric S. Fetzer; Olivier Franza; Tom Grutkowski; Casey Little; Charles Morganti; Gary Moyer; et al. (IEEE J. Solid State Circuits, 2012)

Multifunctional Woven Structure Operating as Triboelectric Energy Harvester, Capacitive Tactile Sensor Array, and Piezoresistive Strain Sensor Array. - Ki-Hong Kim; Giyoung Song; Cheolmin Park; Kwang-Seok Yun (Sensors, 2017)

3.5Gsps MIPI C-PHY Receiver Circuit for Automatic Test Equipment. - Seongkwan Lee; Minho Kang; Cheolmin Park; HyungSun Ryu; Jaemoo Choi; Byunghyun Yim (ITC, 2021)

4.5 Gsps MIPI D-PHY Receiver Circuit for Automatic Test Equipment. - Seongkwan Lee; Cheolmin Park; Minho Kang; Jun Yeon Won; HyungSun Ryu; Jaemoo Choi; Byunghyun Yim (ITC, 2022)

Method for Adjusting Termination Resistance Using PMU in DC Test. - Seongkwan Lee; Minho Kang; Cheolmin Park; Jun Yeon Won; Jaemoo Choi (ITC, 2023)

Method for Diagnosing Channel Damage Using FPGA Transceiver. - Seongkwan Lee; Jun Yeon Won; Cheolmin Park; Minho Kang; Jaemoo Choi (ITC, 2023)

Probe Card Ground Noise Canceling Circuit. - Seongkwan Lee; Minho Kang; Cheolmin Park; Jun Yeon Won; Jaemoo Choi; Chanyeol Park; Sunyong Park; Woonphil Yang (ITC, 2024)