WL under-driving scheme with decremental step voltage and incremental step time for high-capacity NAND flash memory. - Junyoung Ko; Younghwi Yang; Seong-Ook Jung; Jisu Kim; Cheon An Lee; Young-Sun Min; Jin-Young Chun; Moosung Kim (ISCAS, 2016)

256 Gb 3 b/Cell V-nand Flash Memory With 48 Stacked WL Layers. - Dongku Kang; Woopyo Jeong; Chulbum Kim; Doo-Hyun Kim; Yong-Sung Cho; Kyung-Tae Kang; Jinho Ryu; Kyung-Min Kang; Sungyeon Lee; Wandong Kim; Hanjun Lee; Jaedoeg Yu; et al. (IEEE J. Solid State Circuits, 2017)

A 1Tb 4b/cell 64-stacked-WL 3D NAND flash memory with 12MB/s program throughput. - Seungjae Lee 001; Chulbum Kim; Minsu Kim 004; Sung-Min Joe; Joonsuc Jang; Seungbum Kim; Kangbin Lee; Jisu Kim; Jiyoon Park; Hanjun Lee; Min-Seok Kim; Seonyong Lee; et al. (ISSCC, 2018)

Variation-Tolerant WL Driving Scheme for High-Capacity NAND Flash Memory. - Junyoung Ko; Younghwi Yang; Jisu Kim; Cheon An Lee; Young-Sun Min; Jin-Young Chun; Moosung Kim; Seong-Ook Jung (IEEE Trans. Very Large Scale Integr. Syst., 2019)

A 512Gb 3b/Cell 7th -Generation 3D-NAND Flash Memory with 184MB/s Write Throughput and 2.0Gb/s Interface. - Jiho Cho; D. Chris Kang; Jongyeol Park; Sangwan Nam; Jung-Ho Song; Bong-Kil Jung; Jaedoeg Lyu; Hogil Lee; Won-Tae Kim 004; Hongsoo Jeon; Sunghoon Kim 001; In-Mo Kim; et al. (ISSCC, 2021)

A 1Tb 3b/Cell 8th-Generation 3D-NAND Flash Memory with 164MB/s Write Throughput and a 2.4Gb/s Interface. - Moosung Kim; Sung-Won Yun; Jungjune Park; Hyun Kook Park; Jungyu Lee 002; Yeong Seon Kim; Dae-Hoon Na; Sara Choi; Youngsun Song; Jonghoon Lee; Hyun-Jun Yoon; Kangbin Lee; et al. (ISSCC, 2022)