A 1 V Phase Locked Loop with Leakage Compensation in 0.13 µm CMOS Technology. - Chi-Nan Chuang; Shen-Iuan Liu (IEICE Trans. Electron., 2006)

A 40GHz DLL-Based Clock Generator in 90nm CMOS Technology. - Chi-Nan Chuang; Shen-Iuan Liu (ISSCC, 2007)

A 0.5-5-GHz Wide-Range Multiphase DLL With a Calibrated Charge Pump. - Chi-Nan Chuang; Shen-Iuan Liu (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

A Time-Constant Calibrated Phase-Locked Loop With a Fast-Locked Time. - Sung-Rung Han; Chi-Nan Chuang; Shen-Iuan Liu (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

A 3-8 GHz Delay-Locked Loop With Cycle Jitter Calibration. - Chi-Nan Chuang; Shen-Iuan Liu (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

A 20-MHz to 3-GHz Wide-Range Multiphase Delay-Locked Loop. - Chi-Nan Chuang; Shen-Iuan Liu (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

A wide-range and fast-locking frequency synthesizer for Wimax and WLAN applications. - Chun-Yen Wu; Chi-Nan Chuang; Chao-Chyun Chen; I-Chyn Wey (GCCE, 2014)