No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips. - Shu-Hsuan Chou; Chien-Chih Chen; Chi-Neng Wen; Yi-Chao Chan; Tien-Fu Chen; Chao-Ching Wang; Jinn-Shyan Wang (DAC, 2009)

NUDA: a non-uniform debugging architecture and non-intrusive race detection for many-core. - Chi-Neng Wen; Shu-Hsuan Chou; Tien-Fu Chen; Alan Peisheng Su (DAC, 2009)

dIP: A Non-intrusive Debugging IP for Dynamic Data Race Detection in Many-Core. - Chi-Neng Wen; Shu-Hsuan Chou; Tien-Fu Chen (ISPAN, 2009)

VeriC: A semi-hardware description language to bridge the gap between ESL design and RTL models. - Shu-Hsuan Chou; Chi-Neng Wen; Yan-Ling Liu; Tien-Fu Chen (ISQED, 2009)

RunAssert: A non-intrusive run-time assertion for parallel programs debugging. - Chi-Neng Wen; Shu-Hsuan Chou; Tien-Fu Chen; Tay-Jyi Lin (DATE, 2010)

Hierarchical circuit-switched NoC for multicore video processing. - Shu-Hsuan Chou; Chien-Chih Chen; Chi-Neng Wen; Tien-Fu Chen; Tay-Jyi Lin (Microprocess. Microsystems, 2011)

IMITATOR: A deterministic multicore replay system with refining techniques. - Shing-Yu Chen; Chi-Neng Wen; Geng-Hau Yang; Wen-Ben Jone; Tien-Fu Chen (VLSI-DAT, 2012)

NUDA: A Non-Uniform Debugging Architecture and Nonintrusive Race Detection for Many-Core Systems. - Chi-Neng Wen; Shu-Hsuan Chou; Chien-Chih Chen; Tien-Fu Chen (IEEE Trans. Computers, 2012)