Frequency-downconversion and IF channel selection A-DQS sample-and-hold pair for two-step-channel-select low-IF receiver. - Pui-In Mak; Chi-sam Sou; Seng-Pan U; Rui Paulo Martins (ICECS, 2003)

An I/Q-multiplexed and OTA-shared CMOS pipelined ADC with an A-DQS S/H front-end for two-step-channel-select low-IF receiver. - Pui-In Mak; Kin-Kwan Ma; Weng-leng Mok; Chi-sam Sou; Kit-man Ho; Cheng-Man Ng; Seng-Pan U.; Rui Paulo Martins (ISCAS (1), 2004)