Design of a pipelined and expandable sorting architecture with simple control scheme. - Chi-Sheng Lin; Bin-Da Liu (ISCAS (4), 2002)

A scalable sorting architecture based on maskable WTA/MAX circuit. - Shin-Hong Ou; Chi-Sheng Lin; Bin-Da Liu (ISCAS (4), 2002)

Low-power and low-voltage fully parallel content-addressable memory. - Chi-Sheng Lin; Kuan-Hua Chen; Bin-Da Liu (ISCAS (5), 2003)

A low-power precomputation-based fully parallel content-addressable memory. - Chi-Sheng Lin; Jui-Chuan Chang; Bin-Da Liu (IEEE J. Solid State Circuits, 2003)

A new successive approximation architecture for low-power low-cost CMOS A/D converter. - Chi-Sheng Lin; Bin-Da Liu (IEEE J. Solid State Circuits, 2003)

A low-power rail-to-rail 6-bit flash ADC based on a novel complementary average-value approach. - Hui-Chin Tseng; Hsin-Hung Ou; Chi-Sheng Lin; Bin-Da Liu (ISLPED, 2004)

A CAM/WTA-Based High Speed and Low Power Longest Prefix Matching Circuit Design. - Ruei-Jhe Tsai; Hsin-Wen Ting; Chi-Sheng Lin; Bin-Da Liu (APCCAS, 2006)

An edge-missing compensator for fast-settling wide-locking-range PLLs. - Ting-Hsu Chien; Chi-Sheng Lin; Ying-Zong Juang; Chun-Ming Huang; Chin-Long Wey (ISSCC, 2009)

An Edge Missing Compensator for Fast Settling Wide Locking Range Phase-Locked Loops. - Chi-Sheng Lin; Ting-Hsu Chien; Chin-Long Wey; Chun-Ming Huang; Ying-Zong Juang (IEEE J. Solid State Circuits, 2009)

Improved time-domain channel estimation techniques in IEEE 802.11p environments. - Chi-Sheng Lin; Jia-Chin Lin 001 (CSNDSP, 2010)

High-speed and low-power programmable frequency divider. - Ting-Hsu Chien; Chi-Sheng Lin; Chin-Long Wey; Ying-Zong Juang; Chun-Ming Huang (ISCAS, 2010)

An effective phase detector for phase-locked loops with wide capture range and fast acquisition time. - Chi-Sheng Lin; Ting-Hsu Chien; Chin-Long Wey (ISCAS, 2010)

Novel Channel Estimation Techniques in IEEE 802.11p Environments. - Chi-Sheng Lin; Jia-Chin Lin 001 (VTC Spring, 2010)

Deflection of Cross-Ply Composite Laminates Induced by Piezoelectric Actuators. - Shiuh-Chuan Her; Chi-Sheng Lin (Sensors, 2010)

A 0.5V 1KS/s 2.5nW 8.52-ENOB 6.8fJ/conversion-step SAR ADC for biomedical applications. - Tsung-Che Lu; Lan-Da Van; Chi-Sheng Lin; Chun-Ming Huang (CICC, 2011)

A 5.5-GHz 1-mW Full-Modulus-Range Programmable Frequency Divider in 90-nm CMOS Process. - Chi-Sheng Lin; Ting-Hsu Chien; Chin-Long Wey (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

Wireless communication performance based on IEEE 802.11p R2V field trials. - Jia-Chin Lin 001; Chi-Sheng Lin; Chih-Neng Liang; Bo-Chiuan Chen (IEEE Commun. Mag., 2012)

Physical-layer transceiving techniques on data-aided orthogonal frequency-division multiplexing towards seamless service on vehicular communications. - Chi-Sheng Lin; Jia-Chin Lin 001 (IET Commun., 2013)

Vibration Analysis of Composite Laminate Plate Excited by Piezoelectric Actuators. - Shiuh-Chuan Her; Chi-Sheng Lin (Sensors, 2013)

Performance evaluations of channel estimations in IEEE 802.11p environments. - Chi-Sheng Lin; Che-Kang Sun; Jia-Chin Lin 001; Bo-Chiuan Chen (Telecommun. Syst., 2013)

Simultaneous and Anonymous Mobile Network Authentication Scheme Based on Chaotic Maps. - Wen-Chung Kuo; Chi-Sheng Lin; Chen-Tsun Chuang; Ming-Chih Kao (Inf. Technol. Control., 2016)