A DEM Scheme for I/Q Mismatch Compensation in Multi-Bit CT Delta Sigma Modulator. - Chi-Tung Ko; Kong-Pang Pun (ISCAS, 2007)

A chopper-stabilized high-pass Delta-Sigma Modulator with reduced chopper charge injection. - Yin-Sheng Zhao; Siu-Kei Tang; Chi-Tung Ko; Kong-Pang Pun (Microelectron. J., 2011)

A charge-pump and comparator based power-efficient pipelined ADC technique. - Xian Tang; Chi-Tung Ko; Kong-Pang Pun (Microelectron. J., 2012)

A High-Linearity Capacitance-to-Digital Converter Suppressing Charge Errors From Bottom-Plate Switches. - Bing Li; Lei Sun; Chi-Tung Ko; Alex Kak-Yeung Wong; Kong-Pang Pun (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Optimizing the Stage Resolution in Pipelined SAR ADCs for High-Speed High-Resolution Applications. - Lei Sun; Chi-Tung Ko; Kong-Pang Pun (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

A 5-ps Vernier sub-ranging time-to-digital converter with DNL calibration. - Chi-Tung Ko; Kong-Pang Pun; Andreas Gothenberg (Microelectron. J., 2015)