Combined circuit architecture for computing normal basis and Montgomery multiplications over GF(2m). - Chiou-Yng Lee; Chia-Chen Fan; Erl-Huei Lu (Int. J. Auton. Adapt. Commun. Syst., 2011)

Low Complexity Digit-Serial Multiplier over GF(2^m) Using Karatsuba Technology. - Trong-Yen Lee; Min-Jea Liu; Chia-Chen Fan; Chia-Chun Tsai; Haixia Wu (CISIS, 2013)

Efficient Digit-Serial Multiplier Employing Karatsuba Algorithm. - Shyan-Ming Yuan; Chiou-Yng Lee; Chia-Chen Fan (ICGEC (2), 2015)

A House Price Prediction for Integrated Web Service System of Taiwan Districts. - Chia-Chen Fan; Shyan-Ming Yuan; Xue-Bai Zhang; Yu-Chuan Lin (ICGEC, 2017)

Low-Complexity Digit-Serial Multiplier Over $GF(2^{m})$ Based on Efficient Toeplitz Block Toeplitz Matrix-Vector Product Decomposition. - Chiou-Yng Lee; Pramod Kumar Meher; Chia-Chen Fan; Shyan-Ming Yuan (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Exploring Students' Behaviors in Editing Learning Environment. - Xue-Bai Zhang; Xiaolong Liu 001; Shyan-Ming Yuan; Chia-Chen Fan; Chuen-Tsai Sun (ITS, 2018)

Efficient Implementation of Karatsuba Algorithm Based Three-Operand Multiplication Over Binary Extension Field. - Chiou-Yng Lee; Chia-Chen Fan; Jiafeng Xie; Shyan-Ming Yuan (IEEE Access, 2018)