Automatic Functional Vector Generation Using the Interacting FSM Model. - Chien-Nan Jimmy Liu; Chia-Chih Yen; Jing-Yang Jou (ISQED, 2001)

A Practical Approach to Cycle Bound Estimation for Property Checking. - Chia-Chih Yen; Kuang-Chien Chen; Jing-Yang Jou (IWLS, 2002)

On compliance test of on-chip bus for SOC. - Hue-Min Lin; Chia-Chih Yen; Che-Hua Shih; Jing-Yang Jou (ASP-DAC, 2004)

Enhancing sequential depth computation with a branch-and-bound algorithm. - Chia-Chih Yen; Jing-Yang Jou (HLDVT, 2004)

A Divide-and-Conquer-Based Algorithm for Automatic Simulation Vector Generation. - Chia-Chih Yen; Jing-Yang Jou; Kuang-Chien Chen (IEEE Des. Test Comput., 2004)

An optimum algorithm for compacting error traces for efficient functional debugging. - Chia-Chih Yen; Jing-Yang Jou (HLDVT, 2005)

Diagnosing Silicon Failures Based on Functional Test Patterns. - Chia-Chih Yen; Ten Lin; Hermes Lin; Kai Yang; Ta-Yung Liu; Yu-Chin Hsu (MTV, 2006)

An Optimum Algorithm for Compacting Error Traces for Efficient Design Error Debugging. - Chia-Chih Yen; Jing-Yang Jou (IEEE Trans. Computers, 2006)

A General Failure Candidate Ranking Framework for Silicon Debug. - Chia-Chih Yen; Ten Lin; Hermes Lin; Kai Yang; Ta-Yung Liu; Yu-Chin Hsu (VTS, 2008)

FSM-Based Formal Compliance Verification of Interface Protocols. - Che-Hua Shih; Ya-Ching Yang; Chia-Chih Yen; Juinn-Dar Huang; Jing-Yang Jou (J. Inf. Sci. Eng., 2010)

A formal method to improve SystemVerilog functional coverage. - An-Che Cheng; Chia-Chih Yen; Jing-Yang Jou (HLDVT, 2012)

Efficient Coverage-Driven Stimulus Generation Using Simultaneous SAT Solving, with Application to SystemVerilog. - An-Che Cheng; Chia-Chih Jack Yen; Celina G. Val; Sam Bayless; Alan J. Hu; Iris Hui-Ru Jiang; Jing-Yang Jou (ACM Trans. Design Autom. Electr. Syst., 2014)

Failure Root Cause Analysis Automation on Functional Simulation Regressions. - Chia-Chih Jack Yen (VLSI-DAT, 2019)

Embedding Hierarchical Signal to Siamese Network for Fast Name Rectification. - Yi-An Chen; Gung-Yu Pan; Che-Hua Shih; Yen-Chin Liao; Chia-Chih Yen; Hsie-Chia Chang (DATE, 2020)