Characterization of solder interfaces using laser flash metrology. - Chia-Pin Chiu; James Maveety; Quan A. Tran (Microelectron. Reliab., 2002)

Cooling a Microprocessor Chip. - Ravi Mahajan; Chia-Pin Chiu; Greg Chrysler (Proc. IEEE, 2006)

8 Tbps Co-Packaged FPGA and Silicon Photonics Optical IO. - Kaveh Hosseini; Edwin Kok; Sergey Y. Shumarayev; Chia-Pin Chiu; Arnab Sarkar 004; Asako Toda; Yanjing Ke; Allen Chan; Daniel Jeong; Mason Zhang; Sangeeta Raman; Thungoc Tran; et al. (OFC, 2021)

5.12 Tbps Co-Packaged FPGA and Silicon Photonics Interconnect I/O. - Kaveh Hosseini; Edwin Kok; Sergey Y. Shumarayev; Daniel Jeong; Allen Chan; Austin Katzin; Songtao Liu; Radek Roucka; Manan Raval; Minh Mac; Chia-Pin Chiu; Thungoc Tran; et al. (VLSI Technology and Circuits, 2022)

Silicon Photonics Chip I/O for Ultra High-Bandwidth and Energy-Efficient Die-to-Die Connectivity. - Yuyang Wang 003; Songli Wang; Robert Parsons; Asher Novick; Vignesh Gopal; Kaylx Jang; Anthony Rizzo; Chia-Pin Chiu; Kaveh Hosseini; Tim Tri Hoang; Sergey Y. Shumarayev; Keren Bergman (CICC, 2024)