A Systolic Array Based GTD Processor With a Parallel Algorithm. - Chia-Hsiang Yang; Chun-Wei Chou; Chia-Shen Hsu; Chiao-En Chen (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Quack at the NTCIR-17 FinArg-1 Task : Boosting and MLM Enhanced Financial Knowledge Sequence Classification. - Zih-An Lin; Hsiao-Min Li; Adam Lin; Yun-Ching Kao; Chia-Shen Hsu; Yao-Chung Fan (NTCIR, 2023)