Latte: a language, compiler, and runtime for elegant and efficient deep neural networks. - Leonard Truong; Rajkishore Barik; Ehsan Totoni; Hai Liu 012; Chick Markley; Armando Fox; Tatiana Shpeisman (PLDI, 2016)

Reusability is FIRRTL ground: Hardware construction languages, compiler frameworks, and transformations. - Adam M. Izraelevitz; Jack Koenig; Patrick Li; Richard Lin; Angie Wang; Albert Magyar; Donggyu Kim; Colin Schmidt 001; Chick Markley; Jim Lawson; Jonathan Bachrach (ICCAD, 2017)

A Generated Multirate Signal Analysis RISC-V SoC in 16nm FinFET. - Stevo Bailey; Jaeduk Han; Paul Rigge; Richard Lin; Eric Chang; Howard Mao; Zhongkai Wang; Chick Markley; Adam M. Izraelevitz; Angie Wang; Nathan Narevsky; Woo-Rham Bae; et al. (A-SSCC, 2018)

ACED: a hardware library for generating DSP systems. - Angie Wang; Paul Rigge; Adam M. Izraelevitz; Chick Markley; Jonathan Bachrach; Borivoje Nikolic (DAC, 2018)

A Mixed-Signal RISC-V Signal Analysis SoC Generator With a 16-nm FinFET Instance. - Steven Bailey; Paul Rigge; Jaeduk Han; Richard Lin; Eric Chang; Howard Mao; Zhongkai Wang; Chick Markley; Adam M. Izraelevitz; Angie Wang; Nathan Narevsky; Woo-Rham Bae; et al. (IEEE J. Solid State Circuits, 2019)