A 200-MFLOPS 100-MHz 64-b BiCMOS vector-pipelined processor (VPP) ULSI. - Fuyuki Okamoto; Yasuhiko Hagihara; Chie Ohkubo; Naoki Nishi; Hachiro Yamada; Tadayoshi Enomoto (IEEE J. Solid State Circuits, 1991)