Reliable compressive sensing (CS)-based multi-user detection with power-based Zadoff-Chu sequence design. - Chieh-Fang Teng; Ching-Chun Liao; Hung-Yi Cheng; An-Yeu Andy Wu (SiPS, 2017)

Polar Feature Based Deep Architectures for Automatic Modulation Classification Considering Channel Fading. - Chieh-Fang Teng; Ching-Chun Liao; Chun-Hsiang Chen; An-Yeu Andy Wu (GlobalSIP, 2018)

Neural Network-based Equalizer by Utilizing Coding Gain in Advance. - Chieh-Fang Teng; Han-Mo Ou; An-Yeu Andy Wu (GlobalSIP, 2019)

Low-complexity Recurrent Neural Network-based Polar Decoder with Weight Quantization Mechanism. - Chieh-Fang Teng; Chen-Hsi Derek Wu; Andrew Kuan-Shiuan Ho; An-Yeu Andy Wu (ICASSP, 2019)

Unsupervised Learning for Neural Network-based Polar Decoder via Syndrome Loss. - Chieh-Fang Teng; An-Yeu Wu (CoRR, 2019)

Low-Complexity LSTM-Assisted Bit-Flipping Algorithm For Successive Cancellation List Polar Decoder. - Chun-Hsiang Chen; Chieh-Fang Teng; An-Yeu Andy Wu (ICASSP, 2020)

A Neural Network-Aided Viterbi Receiver for Joint Equalization and Decoding. - Han-Mo Ou; Chieh-Fang Teng; Wen-Chiao Tsai; An-Yeu Andy Wu (MLSP, 2020)

Neural Network-Aided BCJR Algorithm for Joint Symbol Detection and Channel Decoding. - Wen-Chiao Tsai; Chieh-Fang Teng; Han-Mo Ou; An-Yeu Andy Wu (SiPS, 2020)

An Ultra-Low Latency 7.8-13.6 pJ/b Reconfigurable Neural Network-Assisted Polar Decoder with Multi-Code Length Support. - Chieh-Fang Teng; Chun-Hsiang Chen; An-Yeu Andy Wu (VLSI Circuits, 2020)

Accumulated Polar Feature based Deep Learning with Channel Compensation Mechanism for Efficient Automatic Modulation Classification under Time varying Channels. - Chieh-Fang Teng; Ching-Yao Chou; Chun-Hsiang Chen; An-Yeu Wu (CoRR, 2020)

Syndrome-Enabled Unsupervised Learning for Channel Adaptive Blind Equalizer with Joint Optimization Mechanism. - Chieh-Fang Teng; Yen-Liang Chen (CoRR, 2020)

Syndrome-Enabled Unsupervised Learning for Neural Network-Based Polar Decoder and Jointly Optimized Blind Equalizer. - Chieh-Fang Teng; Yen-Liang Chen (IEEE J. Emerg. Sel. Topics Circuits Syst., 2020)

Accumulated Polar Feature-Based Deep Learning for Efficient and Lightweight Automatic Modulation Classification With Channel Compensation Mechanism. - Chieh-Fang Teng; Ching-Yao Chou; Chun-Hsiang Chen; An-Yeu Wu (IEEE Trans. Veh. Technol., 2020)

Convolutional Neural Network-Aided Bit-Flipping for Belief Propagation Decoding of Polar Codes. - Chieh-Fang Teng; Andrew Kuan-Shiuan Ho; Chen-Hsi Derek Wu; Sin-Sheng Wong; An-Yeu Andy Wu (ICASSP, 2021)

Two-Step Codebook-Assisted Alternating Minimization (CA-AltMin) for Low-Complexity Hybrid Beamforming Design. - Sin-Sheng Wong; Chieh-Fang Teng; An-Yeu Wu (IEEE Commun. Lett., 2021)

A 7.8-13.6 pJ/b Ultra-Low Latency and Reconfigurable Neural Network-Assisted Polar Decoder With Multi-Code Length Support. - Chieh-Fang Teng; An-Yeu Wu (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Convolutional Neural Network-Aided Tree-Based Bit-Flipping Framework for Polar Decoder Using Imitation Learning. - Chieh-Fang Teng; An-Yeu Andy Wu (IEEE Trans. Signal Process., 2021)

Compression-Aware Projection with Greedy Dimension Reduction for Convolutional Neural Network Activations. - Yu-Shan Tai; Chieh-Fang Teng; Cheng-Yang Chang; An-Yeu Andy Wu (ICASSP, 2022)

Learnable Mixed-precision and Dimension Reduction Co-design for Low-storage Activation. - Yu-Shan Tai; Cheng-Yang Chang; Chieh-Fang Teng; An-Yeu Andy Wu (SiPS, 2022)

Low-Complexity Compressive Channel Estimation for IRS-Aided mmWave Systems With Hypernetwork-Assisted LAMP Network. - Wen-Chiao Tsai; Chi-Wei Chen; Chieh-Fang Teng; An-Yeu Wu (IEEE Commun. Lett., 2022)

WMMSE-Based Alternating Optimization for Low-Complexity Multi-IRS MIMO Communication. - Chi-Wei Chen; Wen-Chiao Tsai; Sin-Sheng Wong; Chieh-Fang Teng; An-Yeu Wu (IEEE Trans. Veh. Technol., 2022)

Joint Optimization of Dimension Reduction and Mixed-Precision Quantization for Activation Compression of Neural Networks. - Yu-Shan Tai; Cheng-Yang Chang; Chieh-Fang Teng; Yi-Ta Chen; An-Yeu Wu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

A 40nm 24.6TOPS/W Scalable EfficientDet Processor for Object Detection. - Yu-Chuan Chuang; Ming-Guang Lin; Chi-Tse Huang; Chieh-Fang Teng; Cheng-Yang Chang; Yi-Ta Chen; An-Yeu Andy Wu (ISCAS, 2024)