A new hardware efficient design for the one dimensional discrete Fourier transform. - Jiun-In Guo; Chien-Chang Lin (ISCAS (5), 2002)

A Low-Power Parameterized Hardware Design for the One-Dimensional Discrete Fourier Transform of Variable Lengths. - Jiun-In Guo; Chien-Chang Lin; Chih-Da Chien (J. Circuits Syst. Comput., 2002)

A parameterized low power design for the variable-length discrete Fourier transform using dynamic pipelining. - Jiun-In Guo; Chih-Da Chien; Chien-Chang Lin (ISCAS (5), 2003)

A high-performance MPEG4 bitstream processing core. - Tai-Lun Chang; Ying-Ming Tsai; Chih-Da Chien; Chien-Chang Lin; Jiun-In Guo (ICME, 2004)

A power-aware IP core generator for the one-dimensional discrete Fourier transform. - Chih-Da Chien; Chien-Chang Lin; Jiun-In Guo; Tien-Fu Chen (ISCAS (3), 2004)

A novel low-cost high-performance VLSI architecture for MPEG-4 AVC/H.264 CAVLC decoding. - Hsiu-Cheng Chang; Chien-Chang Lin; Jiun-In Guo (ISCAS (6), 2005)

Audio Classification and Categorization Based on Wavelets and Support Vector Machine. - Chien-Chang Lin; Shi-Huang Chen; Trieu-Kien Truong; Yukon Chang (IEEE Trans. Speech Audio Process., 2005)

Low Complexity Architecture Design of H.264 Predictive Pixel Compensator for HDTV Application. - Jia-Wei Chen; Chien-Chang Lin; Jiun-In Guo; Jinn-Shyan Wang (ICASSP (3), 2006)

A Condition-based Intra Prediction Algorithm for H.264/AVC. - Jia-Wei Chen; Chun-Hao Chang; Chien-Chang Lin; Yi-Huan Yang; Jiun-In Guo; Jinn-Shyan Wang (ICME, 2006)

A High Throughput VLSI Architecture Design for H.264 Context-Based Adaptive Binary Arithmetic Decoding with Look Ahead Parsing. - Yao-Chang Yang; Chien-Chang Lin; Hsui-Cheng Chang; Ching-Lung Su; Jiun-In Guo (ICME, 2006)

Feature Comparison among Various Wavelets in Speaker Recognition Using Support Vector Machine. - Chien-Chang Lin; Shi-Huang Chen; Tsung-Ching Lin; Trieu-Kien Truong (ISM, 2006)

DCT-Based Image Codec Embedded Cubic Spline Interpolation with Optimal Quantization. - Tsung-Ching Lin; Trieu-Kien Truong; Shi-Huang Chen; Chien-Chang Lin; Pei-Ding Chen (ISM, 2006)

Very Low Bit Rate Video Coding Using H.264 Codec and Cubic Spline Interpolation. - Tsung-Ching Lin; Chien-Wen Chen; Chien-Chang Lin; Trieu-Kien Truong (IIH-MSP, 2007)

A 7mW-to-183mW Dynamic Quality-Scalable H.264 Video Encoder Chip. - Hsiu-Cheng Chang; Jia-Wei Chen; Ching-Lung Su; Yao-Chang Yang; Yao Li; Chun-Hao Chang; Ze-Min Chen; Wei-Sen Yang; Chien-Chang Lin; Ching-Wen Chen; Jinn-Shyan Wang; Jiun-In Guo (ISSCC, 2007)

A 252kgate/71mW Multi-Standard Multi-Channel Video Decoder for High Definition Video Applications. - Chih-Da Chien; Chien-Chang Lin; Yi-Hung Shih; He-Chun Chen; Chia-Jui Huang; Cheng-Yen Yu; Chih-Liang Chen; Ching-Hwa Cheng; Jiun-In Guo (ISSCC, 2007)

A 160K Gates/4.5 KB SRAM H.264 Video Decoder for HDTV Applications. - Chien-Chang Lin; Jia-Wei Chen; Hsiu-Cheng Chang; Yao-Chang Yang; Yi-Huan Ou-Yang; Ming-Chih Tsai; Jiun-In Guo; Jinn-Shyan Wang (IEEE J. Solid State Circuits, 2007)

Segmentation of specific speech signals from multi-dialog environment using SVM and wavelet. - Trieu-Kien Truong; Chien-Chang Lin; Shi-Huang Chen (Pattern Recognit. Lett., 2007)

Artificial intelligence in intelligent tutoring systems toward sustainable education: a systematic review. - Chien-Chang Lin; Anna Y. Q. Huang; Owen H. T. Lu (Smart Learn. Environ., 2023)

DNA of learning behaviors: A novel approach of learning performance prediction by NLP. - Chien-Chang Lin; Eddie S. J. Cheng; Anna Y. Q. Huang; Stephen J. H. Yang (Comput. Educ. Artif. Intell., 2024)