Reliable ultra-low-voltage low-power probabilistic-based noise-tolerant latch design. - I-Chyn Wey; Yi-Jung Lan; Chien-Chang Peng (Microelectron. Reliab., 2013)

Reliable and low error dual modular redundancy FIR filter with wide protection window. - I-Chyn Wey; Chien-Chang Peng; Heng-Jui Chou; Po Tsang Chen (IEICE Electron. Express, 2014)

Wide bandwidth and high precision power supply noise detector by using dual peak detection sample and hold circuits. - I-Chyn Wey; Chien-Chang Peng; Hwang-Cherng Chow (Int. J. Circuit Theory Appl., 2014)

A low power-delay-product and robust Isolated-DICE based SEU-tolerant latch circuit design. - I-Chyn Wey; Yu-Sheng Yang; Bing-Chen Wu; Chien-Chang Peng (Microelectron. J., 2014)

Dynamic-static hybrid near-threshold-voltage adder design for ultra-low power applications. - Xin-Xiang Lian; I-Chyn Wey; Chien-Chang Peng; Zhi-Qun Cheng (IEICE Electron. Express, 2015)

Robust C-element design for soft-error mitigation. - I-Chyn Wey; Bing-Chen Wu; Chien-Chang Peng; Cihun-Siyong Alex Gong; Changhong Yu (IEICE Electron. Express, 2015)

Reliable Low-Power Multiplier Design Using Fixed-Width Replica Redundancy Block. - I-Chyn Wey; Chien-Chang Peng; Feng-Yu Liao (IEEE Trans. Very Large Scale Integr. Syst., 2015)