Using GIDL mechanism for low-power consumption and data retention time improvement in a double-gate nanowire TFT 1T-DRAM with Fin-Gate and Pillar-Body structure. - Wei-Han Lee; Jyi-Tsong Lin; Yu-Chun Wang; Po-Hsieh Lin; Chien-Chia Lai; Yong-Huang Lin; Tin-Chun Chang (ASICON, 2015)