Fuzzy entropy-constrained competitive learning algorithm. - Wen-Jyi Hwang; Chien-Min Ou; Shi-Chiang Liao; Ching-Fung Chine (ESANN, 2000)

Robust Vector Quantization for Burst Error Channels Using Genetic Algorithm. - Wen-Jyi Hwang; Chien-Min Ou; Chin-Ming Yeh (ESANN, 2003)

VLSI architecture for motion vector quantization. - Wen-Jyi Hwang; Chien-Min Ou; Wen-Ming Lu; Chun-Fu Lin (IEEE Trans. Consumer Electron., 2003)

Layered video transmission based on genetic programming for lossy channels. - Wen-Jyi Hwang; Chien-Min Ou; Rui-Chuan Lin; Wen-Wei Hu (Neurocomputing, 2004)

Genetic channel-optimized vector quantizer design for burst error channels. - Wen-Jyi Hwang; Chien-Min Ou; Chin-Ming Yeh (Neurocomputing, 2005)

An efficient VLSI architecture for H.264 variable block size motion estimation. - Chien-Min Ou; Chian-Feng Le; Wen-Jyi Hwang (IEEE Trans. Consumer Electron., 2005)

Efficient Logic Circuit for Network Intrusion Detection. - Huang-Chun Roan; Chien-Min Ou; Wen-Jyi Hwang; Chia-Tien Dan Lo (EUC, 2006)

Design of Robust Communication Systems Using Genetic Algorithms. - Chien-Min Ou; Wen-Jyi Hwang; Hung-Chuan Yung (EuroGP, 2006)

Fractional Full-Search Motion Estimation VLSI Architecture for H.264/AVC. - Chien-Min Ou; Huang-Chun Roan; Wen-Jyi Hwang (PSIVT, 2006)

Concurrent genetic optimization for joint design of source and channel codes. - Chien-Min Ou; Wen-Jyi Hwang; Wen-Wei Hu; Tsung-Yan Lo (Neurocomputing, 2006)

Hybrid Genetic Algorithm for Design of Robust Communication Systems. - Chien-Min Ou; Jing-Jhih Chen; Wen-Jyi Hwang (J. Softw., 2006)

Service Discovery of IP Cameras Using SIP and Zeroconf Protocols. - Yi-Chih Tung; Chien-Min Ou; Wen-Jyi Hwang; Wei-De Wu (ATC, 2008)

Genetic Vector Quantizer Design on Reconfigurable Hardware. - Ting-Kuan Lin; Hui-Ya Li; Wen-Jyi Hwang; Chien-Min Ou; Sheng-Kai Weng (SEAL, 2008)

Layered Image Transmission with Quality Pre-Specifiable JPEG2000. - Chien-Min Ou; Hui-Ya Li; Wen-Jyi Hwang; Mei-Hwa Liu (Int. J. Image Graph., 2008)

VLSI Architecture for Fast Memetic Vector Quantizer Design on Reconfigurable Hardware. - Sheng-Kai Weng; Chien-Min Ou; Wen-Jyi Hwang (ICA3PP, 2009)

FPGA-based ROM-free network intrusion detection using shift-OR circuit. - Wen-Jyi Hwang; Huang-Chun Roan; Ying-Nan Shih; Chia-Tien Dan Lo; Chien-Min Ou (J. Embed. Comput., 2009)

Efficient Header Classification Architecture for Network Intrusion Detection. - Wen-Jyi Hwang; Chien-Min Ou (J. Inf. Sci. Eng., 2009)

Hardware Implementation of k-Winner-Take-All Neural Network with On-chip Learning. - Hui-Ya Li; Chien-Min Ou; Yi-Tsan Hung; Wen-Jyi Hwang; Chia-Lung Hung (CSE, 2010)

FPGA implementation of genetic vector quantizers. - Chien-Min Ou (Neurocomputing, 2010)

Efficient Music Retrieval Systems Design Based on Reconfigurable Hardware. - Chien-Min Ou (J. Circuits Syst. Comput., 2011)

Efficient Architecture For Island Genetic Algorithm in Reconfigurable Hardware. - Chien-Min Ou; Tsung-Yi Yu; Wen-Jyi Hwang; Tsung-Che Chiang (Intell. Autom. Soft Comput., 2012)

Efficient k-Winner-Take-All Competitive Learning Hardware Architecture for On-Chip Learning. - Chien-Min Ou; Hui-Ya Li; Wen-Jyi Hwang (Sensors, 2012)