High-efficient hardware design based on enhanced Tschirnhaus transform for solving the LSPs. - Chung-Hsien Chang; Shi-Huang Chen; Bo-Wei Chen; Chih-Hsiang Peng; Jhing-Fa Wang (ISCAS, 2013)

REC-STA: Reconfigurable and Efficient Chip Design With SMO-Based Training Accelerator. - Chih-Hsiang Peng; Bo-Wei Chen; Ta-Wen Kuan; Po-Chuan Lin; Jhing-Fa Wang; Nai-Sheng Shih (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Low-power enhanced system-on-chip design for sequential minimal optimisation learning core with tri-layer bus and butterfly-path accelerator. - Chih-Hsiang Peng; Po-Chuan Lin; Shovan Barma; Jhing-Fa Wang; Hong-Yuan Peng; K. Bharanitharan; Ta-Wen Kuan (IET Comput. Digit. Tech., 2015)

Trainable and Low-Cost SMO Pattern Classifier Implemented via MCMC and SFBS Technologies. - Chih-Hsiang Peng; Ta-Wen Kuan; Po-Chuan Lin; Jhing-Fa Wang; Guo-Ji Wu (IEEE Trans. Very Large Scale Integr. Syst., 2015)

A New Binary-Halved Clustering Method and ERT Processor for ASSR System. - Chih-Hung Chou; Ta-Wen Kuan; Shovan Barma; Bo-Wei Chen; Wen Ji; Chih-Hsiang Peng; Jhing-Fa Wang (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Sentiment Analysis for Investment Atmosphere Scoring. - Chih-Hsiang Peng; Liang-Chih Yu (ROCLING, 2020)

An Anomaly-Based IDS Framework Using Centroid-Based Classification. - Iuon-Chang Lin; Ching-Chun Chang; Chih-Hsiang Peng (Symmetry, 2022)