Effect of Wordline/Bitline Scaling on the Performance, Energy Consumption, and Reliability of Cross-Point Memory Array. - Jiale Liang; Chih-Wei Stanley Yeh; S. Simon Wong; H.-S. Philip Wong (ACM J. Emerg. Technol. Comput. Syst., 2013)

Compact One-Transistor-N-RRAM Array Architecture for Advanced CMOS Technology. - Chih-Wei Stanley Yeh; S. Simon Wong (IEEE J. Solid State Circuits, 2015)