An Analytical Approach for Quantifying Clock Jitter Effects in Continuous-Time Sigma-Delta Modulators. - Yuan-Shuo Chang; Chia-Liang Lin; Wen-Shan Wang; Chao-Cheng Lee; Chih-Yung Shih (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

A new scheme to achieve weighted fairness for WLAN supporting multimedia services. - Ray-Guang Cheng; Chung-Ju Chang; Chih-Yung Shih; Yih-Shen Chen (IEEE Trans. Wirel. Commun., 2006)

An 11b 800MS/s Time-Interleaved ADC with Digital Background Calibration. - Cheng-Chung Hsu; Fong-Ching Huang; Chih-Yung Shih; Chen-Chih Huang; Ying-Hsi Lin; Chao-Cheng Lee; Behzad Razavi (ISSCC, 2007)