Reduction calculator in an FPGA based switching Hub for high performance clusters. - Takuya Kuhara; Chiharu Tsuruta; Toshihiro Hanawa; Hideharu Amano (FPL, 2015)

Trax solver on Zynq with Deep Q-Network. - Naru Sugimoto; Takuji Mitsuishi; Takahiro Kaneda; Chiharu Tsuruta; Ryotaro Sakai; Hideki Shimura; Hideharu Amano (FPT, 2015)

Off-Loading LET Generation to PEACH2: A Switching Hub for High Performance GPU Clusters. - Chiharu Tsuruta; Yohei Miki 001; Takuya Kuhara; Hideharu Amano; Masayuki Umemura (SIGARCH Comput. Archit. News, 2015)

Trax solver on Zynq using incremental update algorithm. - Hiroshi Nakahara; Tetsui Ohkubo; Hideki Shimura; Ryotaro Sakai; Chiharu Tsuruta; Takahiro Kaneda; Hideharu Amano (FPT, 2016)

Accelerator-in-switch: A framework for tightly coupled switching hub and an accelerator with FPGA. - Chiharu Tsuruta; Takahiro Kaneda; Naoki Nishikawa; Hideharu Amano (FPL, 2017)

Performance Evaluation of PEACH3: Field-Programmable Gate Array Switch for Tightly Coupled Accelerators. - Takahiro Kaneda; Ryotaro Sakai; Naoki Nishikawa; Toshihiro Hanawa; Chiharu Tsuruta; Hideharu Amano (HEART, 2017)