A 44GHz Dual-Modulus Divide-by-4/5 Prescaler in 90nm CMOS Technology. - Chihun Lee; Lan-chou Cho; Shen-Iuan Liu (CICC, 2006)

A 33.6-to-33.8Gb/s Burst-Mode CDR in 90nm CMOS. - Lan-Chou Cho; Chihun Lee; Shen-Iuan Liu (ISSCC, 2007)

A 58-to-60.4GHz Frequency Synthesizer in 90nm CMOS. - Chihun Lee; Shen-Iuan Liu (ISSCC, 2007)

A 1.2-V 37-38.5-GHz Eight-Phase Clock Generator in 0.13-µm CMOS Technology. - Lan-Chou Cho; Chihun Lee; Shen-Iuan Liu (IEEE J. Solid State Circuits, 2007)

A 50.8-53-GHz Clock Generator Using a Harmonic-Locked PD in 0.13- mum CMOS. - Chihun Lee; Lan-Chou Cho; Jia-Hao Wu; Shen-Iuan Liu (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

A 33.6-to-33.8 Gb/s Burst-Mode CDR in 90 nm CMOS Technology. - Lan-Chou Cho; Chihun Lee; Chao-Ching Hung; Shen-Iuan Liu (IEEE J. Solid State Circuits, 2009)

A 4-in-1 (WiFi/BT/FM/GPS) connectivity SoC with enhanced co-existence performance in 65nm CMOS. - Yuan-Hung Chung; Min Chen; Wei-Kai Hong; Jie-Wei Lai; Sheng-Jau Wong; Chien-Wei Kuan; Hong-Lin Chu; Chihun Lee; Chih-Fan Liao; Hsuan-Yu Liu; Hong-Kai Hsu; Li-Chun Ko; et al. (ISSCC, 2012)

Development of Artificial Neural Network System to Recommend Process Conditions of Injection Molding for Various Geometries. - Chihun Lee; Juwon Na; Kyongho Park; Hyeonjae Yu; Jongsun Kim; Kwonil Choi; Dongyong Park; Seongjin Park; Junsuk Rho; Seungchul Lee (Adv. Intell. Syst., 2020)

Scalable and High-Throughput Top-Down Manufacturing of Optical Metasurfaces. - Taejun Lee; Chihun Lee; Dong Kyo Oh; Trevon Badloe; Jong G. Ok; Junsuk Rho (Sensors, 2020)

Process-aware and high-fidelity microstructure generation using stable diffusion. - Hoang Cuong Phan; Minh Tien Tran; Chihun Lee; Hoheok Kim; Sehyok Oh; Dong-Kyu Kim; Ho Won Lee (CoRR, 2025)