Hardware Based Loop Optimization for CGRA Architectures. - Chilankamol Sunny; Satyajit Das; Kevin J. M. Martin; Philippe Coussy (ARC, 2021)

Energy Efficient Hardware Loop Based Optimization for CGRAs. - Chilankamol Sunny; Satyajit Das; Kevin J. M. Martin; Philippe Coussy (J. Signal Process. Syst., 2022)

Refined PSO Clustering for Not Well-Separated Data. - Chilankamol Sunny; Shibu Kumar K. B (J. Exp. Theor. Artif. Intell., 2023)

Standalone Nested Loop Acceleration on CGRAs for Signal Processing Applications. - Chilankamol Sunny; Satyajit Das; Kevin J. M. Martin; Philippe Coussy (DASIP, 2024)

CREPE: Concurrent Reverse-Modulo-Scheduling and Placement for CGRAs. - Chilankamol Sunny; Satyajit Das; Kevin J. M. Martin; Philippe Coussy (IEEE Trans. Parallel Distributed Syst., 2024)