On a Multiprocessor System with Dynamic Redundancy. - Fabrizio Lombardi; Chin-Long Wey (RTSS, 1985)

On a Novel Self-Test Approach to Digital Testing. - Chin-Long Wey; Fabrizio Lombardi (Comput. J., 1987)

On the Repair of Redundant RAM's. - Chin-Long Wey; Fabrizio Lombardi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987)

PLAYGROUND: Minimization of PLAs with Mixed Ground True Outputs. - Chin-Long Wey; Tsin-Yuan Chang (DAC, 1988)

Test generation of C-testable array dividers. - Chin-Long Wey; Sin-Min Chang (ICCD, 1988)

The design of concurrent error diagnosable systolic arrays for band matrix multiplications. - Shek-Wayne Chan; Chin-Long Wey (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988)

On yield consideration for the design of redundant programmable logic arrays. - Chin-Long Wey (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988)

OPAM: an efficient output phase assignment for multilevel logic minimization. - Chin-Long Wey; Sin-Min Chang; Jing-Yang Jou (ICCD, 1989)

Fault Location in Repairable Programmable Logic Arrays. - Chin-Long Wey (ITC, 1989)

Design of fault diagnosable and repairable PLA's. - Tsin-Yuan Chang; Chin-Long Wey (IEEE J. Solid State Circuits, 1989)

Design of Repairable and Fully Diagnosable Folded PLAs for Yield Enhancement. - Chin-Long Wey; Jyhyeung Ding; Tsin-Yuan Chang (DAC, 1990)

Design of repairable and fully testable folded PLAs. - Chin-Long Wey; Jyhyeung Ding (ICCD, 1990)

An efficient output phase assignment for PLA minimization. - Chin-Long Wey; Tsin-Yuan Chang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990)

Concurrent Error Detection in Array Dividers by Alternating Input Data. - Chin-Long Wey (ICCD, 1991)

Design of fault-diagnosable and repairable folded PLAs for yield enhancement. - Chin-Long Wey; Tsin-Yuan Chang; Jyhyeuan Ding (IEEE J. Solid State Circuits, 1991)

ASLCScan: A Scan Design Technique for Asynchronous Sequential Logic Circuits. - Chin-Long Wey; Ming-Der Shieh; P. David Fisher (ICCD, 1993)

Race-free state assignments using bipartite graphs. - Jun-Woo Kang; Chin-Long Wey; P. David Fisher (ISCAS, 1993)

An accurate reference-generating circuit for successive approximation current mode A/D converters. - Shoba Krishnan; Chin-Long Wey (Int. J. Circuit Theory Appl., 1993)

Concurrent Error Detection in High Speed Carry-free Division Using Alternative Input Data. - Chin-Long Wey (ICCD, 1994)

High-radix SRT division with speculation of quotient digits . - Tzu-Hsi Pan; Hyon-Sok Kay; Youngsun Chun; Chin-Long Wey (ICCD, 1995)

A self-timed redundant-binary number to binary number converter for digital arithmetic processors. - Chin-Long Wey; Haiyan Wang; Cheng-Ping Wang (ICCD, 1995)

Simple yet accurate current copiers for low-voltage current-mode signal-processing applications. - Ren-Yuan Huang; Chin-Long Wey (Int. J. Circuit Theory Appl., 1995)

Application of Bipartite Graphs for Achieving Race-Free State Assignment. - Jun-Woo Kang; Chin-Long Wey; P. David Fisher (IEEE Trans. Computers, 1995)

Test generation and concurrent error detection in current-mode A/D converters. - Chin-Long Wey; Shoba Krishnan; Sondes Sahli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995)

Test Generation Of Analog Switched-Current Circuits. - Cheng-Ping Wang; Chin-Long Wey (Asian Test Symposium, 1996)

On Design of Efficient Square Generator. - Chin-Long Wey (ICCD, 1996)

Mixed-signal circuit testing-A review. - Chin-Long Wey (ICECS, 1996)

Built-in self-test (BIST) design of high-speed carry-free dividers. - Chin-Long Wey (IEEE Trans. Very Large Scale Integr. Syst., 1996)

Development of Hierarchical Testability Design Methodologies for Analog/Mixed-Signal Integrated Circuits. - Cheng-Ping Wang; Chin-Long Wey (ICCD, 1997)

Mapping Multiplication Algorithms into a Family of LUT-based FPGAs (Abstract). - Manuel Jiménez; Chin-Long Wey; Michael A. Shanblatt (FPGA, 1998)

Test points selection process and diagnosability analysis of analog integrated circuits. - Wei-Hsing Huang; Chin-Long Wey (ICCD, 1998)

High-speed CMOS switched-current D/A converters for low-power/low-voltage signal processing applications. - Jin-Sheng Wang; Chin-Long Wey (ICECS, 1998)

Diagnosability analysis of analogue circuits. - Wei-Hsing Huang; Chin-Long Wey (Int. J. Circuit Theory Appl., 1998)

Fault macromodel for switches in switched-current circuits. - Cheng-Ping Wang; Chin-Long Wey (Int. J. Circuit Theory Appl., 1998)

Design of a High-Speed Square Generator. - Chin-Long Wey; Ming-Der Shieh (IEEE Trans. Computers, 1998)

ATPRG: an automatic test program generator using HDL-A for fault diagnosis of analog/mixed-signal integrated circuits. - Wei-Hsing Huang; Chin-Long Wey (IEEE Trans. Instrum. Meas., 1998)

Mixed-Signal SoC Testing: Is Mixed-Signal Design-for-Test on Its Way. - Chin-Long Wey; Adam Osseiran; José Luis Huertas; Yeon-Chen Nieu (Asian Test Symposium, 2000)

A fully differential current copier for performance improvement. - Ren-Yuan Huang; Jin-Sheng Wang; Chin-Long Wey (Int. J. Circuit Theory Appl., 2000)

Extreme-voltage stress vector generation of analog CMOS ICs for gate-oxide reliability enhancement. - Mohammad Athar Khalil; Chin-Long Wey (ITC, 2001)

High-Voltage Stress Test Paradigms of Analog CMOS ICs for Gate-Oxide Reliability Enhancement. - Mohammad Athar Khalil; Chin-Long Wey (VTS, 2001)

Burn-In Stress Test of Analog CMOS ICs. - Chin-Long Wey; Meng-Yao Liu (Asian Test Symposium, 2004)

A noise optimization technique for codesign of CMOS radio-frequency low noise amplifiers and low-quality spiral inductors. - Shaolei Quan; Chin-Long Wey (ACM Great Lakes Symposium on VLSI, 2004)

Hierarchical extreme-voltage stress test of analog CMOS ICs for gate-oxide reliability enhancement. - Chin-Long Wey; Mohammad Athar Khalil; Jim Liu; Gregory Wierzba (ACM Great Lakes Symposium on VLSI, 2004)

Design of a CMOS Operational Amplifier for Extreme-Voltage Stress Test. - Shaolei Quan; Qiang Qiang; Chin-Long Wey (Asian Test Symposium, 2005)

An Efficient Transparent Test Scheme for Embedded Word-Oriented Memories. - Jin-Fu Li 001; Tsu-Wei Tseng; Chin-Long Wey (DATE, 2005)

Design of a CMOS Operational Amplifier Amenable to Extreme Voltage Stress. - Shaolei Quan; Meng-Yao Liu; Chin-Long Wey (DFT, 2005)

A novel reconfigurable architecture of low-power unsigned multiplier for digital signal processing. - Shaolei Quan; Qiang Qiang; Chin-Long Wey (ISCAS (4), 2005)

Reliability enhancement of CMOS SRAMs. - Chin-Long Wey; Meng-Yao Liu; Shaolei Quan (MTDT, 2005)

Design of Reliable CMOS Phase-Locked Loops. - Chin-Long Wey; Chi-Shu Huang; Shaolei Quan (ICECS, 2006)

Compressed domain content-based retrieval of MP3 audio example using quantization tree indexing and melody-line tracking method. - Tsung-Han Tsai; Yung-Tsung Wang; Jui Hong Hung; Chin-Long Wey (ISCAS, 2006)

High-speed, Low Cost Parallel Memory-Based FFT Processors for OFDM Applications. - Chin-Long Wey; Shin-Yo Lin; Wei-Chien Tang; Muh-Tien Shiue (ICECS, 2007)

Efficient VLSI Implementation of Memory-Based FFT Processors for DVB-T Applications. - Chin-Long Wey; Wei-Chien Tang; Shin-Yo Lin (ISVLSI, 2007)

Design of cost-efficient memory-based FFT processors using single-port memories. - Yao-Xian Yang; Jin-Fu Li 001; Hsiang-Ning Liu; Chin-Long Wey (SoCC, 2007)

Design of square generator with small look-up table. - Wei-Chang Tsai; Ming-Der Shieh; Wen-Ching Lin; Chin-Long Wey (APCCAS, 2008)

A low-cost continuous flow parallel memory-based FFT processor for Ultra-Wideband (UWB) applications. - Chin-Long Wey; Shin-Yo Lin; Hsu-Sheng Wang; Chun-Ming Huang (APCCAS, 2008)

PrSoC: Programmable System-on-chip (SoC) for silicon prototyping. - Chun-Ming Huang; Chien-Ming Wu; Chih-Chyau Yang; Chin-Long Wey (ISCAS, 2008)

Impact of Capacitance Correlation on Yield Enhancement of Mixed-Signal/Analog Integrated Circuits. - Pei-Wen Luo; Jwu-E Chen; Chin-Long Wey; Liang-Chia Cheng; Ji-Jan Chen; Wen Ching Wu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008)

Algorithms of Finding the First Two Minimum Values and Their Hardware Implementation. - Chin-Long Wey; Ming-Der Shieh; Shin-Yo Lin (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Implementation and Prototyping of a Complex Multi-project System-on-a-chip. - Chun-Ming Huang; Chien-Ming Wu; Chih-Chyau Yang; Wei-De Chien; Shih-Lun Chen; Chi-Shi Chen; Jiann-Jenn Wang; Chin-Long Wey (ISCAS, 2009)

Yield evaluation of analog placement with arbitrary capacitor ratio. - Jwu-E Chen; Pei-Wen Luo; Chin-Long Wey (ISQED, 2009)

An edge-missing compensator for fast-settling wide-locking-range PLLs. - Ting-Hsu Chien; Chi-Sheng Lin; Ying-Zong Juang; Chun-Ming Huang; Chin-Long Wey (ISSCC, 2009)

Robustness investigation of the FlexRay system. - Kuen-Long Leu; Chin-Long Wey; Jwu-E Chen; Yung-Yuan Chen (SIES, 2009)

An Edge Missing Compensator for Fast Settling Wide Locking Range Phase-Locked Loops. - Chi-Sheng Lin; Ting-Hsu Chien; Chin-Long Wey; Chun-Ming Huang; Ying-Zong Juang (IEEE J. Solid State Circuits, 2009)

High-speed and low-power programmable frequency divider. - Ting-Hsu Chien; Chi-Sheng Lin; Chin-Long Wey; Ying-Zong Juang; Chun-Ming Huang (ISCAS, 2010)

An effective phase detector for phase-locked loops with wide capture range and fast acquisition time. - Chi-Sheng Lin; Ting-Hsu Chien; Chin-Long Wey (ISCAS, 2010)

Placement Optimization for Yield Improvement of Switched-Capacitor Analog Integrated Circuits. - Jwu-E Chen; Pei-Wen Luo; Chin-Long Wey (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

A Transceiver Front End for Electronic Control Units in FlexRay-Based Automotive Communication Systems. - Chua-Chin Wang; Gang-Neng Sung; Po-Cheng Chen; Chin-Long Wey (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Low-cost FFT processor for DVB-T2 applications. - Shin-Yo Lin; Chin-Long Wey; Ming-Der Shieh (IEEE Trans. Consumer Electron., 2010)

Design of ultra-wide-load, high-efficient DC-DC buck converters. - Chin-Long Wey; Chan-I Chiu; Kun-Chun Chang; Chung-Hsien Hsu; Gang-Neng Sung (ICECS, 2011)

Yield-award placement optimization for Switched-Capacitor analog integrated circuits. - Chien-Chih Huang; Jwu-E Chen; Pei-Wen Luo; Chin-Long Wey (SoCC, 2011)

Design Methodology for Yield Enhancement of Switched-Capacitor Analog Integrated Circuits. - Pei-Wen Luo; Jwu-E Chen; Chin-Long Wey (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011)

Reconfigurable Homogenous Multi-Core FFT Processor Architectures for Hybrid SISO/MIMO OFDM Wireless Communications. - Chin-Long Wey; Shin-Yo Lin; Pei-Yun Tsai 001; Ming-Der Shieh (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011)

A Low-Cost Continuous-Flow Parallel Memory-Based FFT Processor for UWB Applications. - Chin-Long Wey; Shin-Yo Lin; Hsu-Sheng Wang; Hung-Lieh Chen; Chun-Ming Huang (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011)

A 5.5-GHz 1-mW Full-Modulus-Range Programmable Frequency Divider in 90-nm CMOS Process. - Chi-Sheng Lin; Ting-Hsu Chien; Chin-Long Wey (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

Programmable System-on-Chip for Silicon Prototyping. - Chun-Ming Huang; Chien-Ming Wu; Chih-Chyau Yang; Shih-Lun Chen; Chi-Shi Chen; Jiann-Jenn Wang; Kuen-Jong Lee; Chin-Long Wey (IEEE Trans. Ind. Electron., 2011)

Generic Reliability Analysis for Safety-Critical FlexRay Drive-By-Wire Systems. - Kuen-Long Leu; Jwu-E Chen; Chin-Long Wey; Yung-Yuan Chen (ICCVE, 2012)

Reliable Power Delivery System Design for Three-Dimensional Integrated Circuits (3D ICs). - Pei-Wen Luo; Tao Wang; Chin-Long Wey; Liang-Chia Cheng; Bih-Lan Sheu; Yiyu Shi 001 (ISVLSI, 2012)

A Fast 64-bit hybrid adder design in 90nm CMOS process. - Shao-Kai Chang; Chin-Long Wey (MWSCAS, 2012)

Efficient algorithm and hardware implementation of 3N for arithmetic and for Radix-8 encodings. - Ping-Chang Jui; Gang-Neng Sung; Chin-Long Wey (MWSCAS, 2012)

A fast hysteretic buck converter with adaptive ripple controller. - Chin-Long Wey; Ze-Yan Li; Kun-Chun Chang; Gang-Neng Sung; Dennis K. Wey (MWSCAS, 2012)

Enhancement of Controller Area Network (CAN) bus arbitration mechanism. - Chin-Long Wey; Chung-Hsien Hsu; Kun-Chun Chang; Ping-Chang Jui (ICCVE, 2013)

A unitized charging and discharging smart battery management system. - Chin-Long Wey; Ping-Chang Jui (ICCVE, 2013)

A single-inductor programmable-output (SIPO) DC-DC converter for low power applications. - Chin-Long Wey; Chung-Hsien Hsu; Gang-Neng Sung (IECON, 2013)

A voltage-mode boost DC-DC converter with a constant-duty-cycle pulse control. - Chin-Long Wey; Chung-Hsien Hsu; Tai-Wei Chang (LASCAS, 2013)

Low-cost parallel FFT processors with conflict-free ROM-based twiddle factor generator for DVB-T2 applications. - Ping-Chang Jui; Chin-Long Wey; Muh-Tian Shiue (MWSCAS, 2013)

Optimal common-centroid-based unit capacitor placements for yield enhancement of switched-capacitor circuits. - Chien-Chih Huang; Chin-Long Wey; Jwu-E Chen; Pei-Wen Luo (ACM Trans. Design Autom. Electr. Syst., 2013)

A 20MS/s buck/boost supply modulator for envelope tracking applications with direct digital interface. - Shang-Hsien Yang; Chin-Long Wey; Ke-Horng Chen; Ying-Hsi Lin; Jing-Jia Chen; Tsung-Yen Tsai; Chao-Cheng Lee (A-SSCC, 2014)

Anti-ESL/ESR variation robust constant-on-time control for DC-DC buck converter in 28nm CMOS technology. - Hsin-Chieh Chen; Wei-Chung Chen; Ying-Wei Chou; Meng-Wei Chien; Chin-Long Wey; Ke-Horng Chen; Ying-Hsi Lin; Tsung-Yen Tsai; Chao-Cheng Lee (CICC, 2014)

Single inductor quad output switching converter with priority-scheduled program for fast transient and unlimited-load range in 40nm CMOS technology. - Wei-Chung Chen; Tzu-Chi Huang; Tsu-Wei Tsai; Ruei-Hong Peng; Kuei-Liang Lin; Ke-Horng Chen; Ying-Hsi Lin; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee; Li-Ren Huang; Chao-Jen Huang; et al. (ESSCIRC, 2014)

A Class-D amplifier powered by embedded single-inductor bipolar-output power module with low common noise and dynamic voltage boosting technique. - Shin-Hao Chen; Kuei-Liang Lin; Shao Siang Ng; Ke-Horng Chen; Chin-Long Wey; Sheng Kang; Kevin Cheng 002; Li-Ren Huang; Chao-Jen Huang; Hsin-Yu Luo (ESSCIRC, 2014)

A dual-level dual-phase pulse-width modulation class-D amplifier with 0.001% THD, 112 dB SNR. - Shang-Hsien Yang; Yuan-Han Yang; Ke-Horng Chen; Chung-Chih Hung; Chin-Long Wey; Ying-Hsi Lin; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee; Zhih Han Tai; Yi Hsuan Cheng; Chi Chung Tsai; et al. (ISCAS, 2014)

17.10 0.65V-input-voltage 0.6V-output-voltage 30ppm/°C low-dropout regulator with embedded voltage reference for low-power biomedical systems. - Wei-Chung Chen; Yi-Ping Su; Yu-Huei Lee; Chin-Long Wey; Ke-Horng Chen (ISSCC, 2014)

±3% voltage variation and 95% efficiency 28nm constant on-time controlled step-down switching regulator directly supplying to Wi-Fi systems. - Wei-Chung Chen; Yung-Sheng Huang; Meng-Wei Chien; Ying-Wei Chou; Hsin-Chieh Chen; Yi-Ping Su; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee (VLSIC, 2014)

A direct AC-DC and DC-DC cross-source energy harvesting circuit with analog iterating-based MPPT technique with 72.5% conversion efficiency and 94.6% tracking efficiency. - Tzu-Chi Huang; Ming-Jhe Du; Kuei-Liang Lin; Shao Siang Ng; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee; Jui-Lung Chen; Hung-Wei Chen (VLSIC, 2014)

Efficient Multiply-by-3 and Divide-by-3 Algorithms and Their Fast Hardware Implementation. - Chin-Long Wey; Ping-Chang Jui; Gang-Neng Sung (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014)

A Switchable Digital-Analog Low-Dropout Regulator for Analog Dynamic Voltage Scaling Technique. - Wei-Chung Chen; Su-Yi Ping; Tzu-Chi Huang; Yu-Huei Lee; Ke-Horng Chen; Chin-Long Wey (IEEE J. Solid State Circuits, 2014)

Fast Charging and High Efficiency Switching-Based Charger With Continuous Built-In Resistance Detection and Automatic Energy Deliver Control for Portable Electronics. - Tzu-Chi Huang; Ruei-Hong Peng; Tsu-Wei Tsai; Ke-Horng Chen; Chin-Long Wey (IEEE J. Solid State Circuits, 2014)

200nA low quiescent current deep-standby mode in 28nm DC-DC buck converter for active implantable medical devices. - Li-Cheng Chu; Te-Fu Yang; Ru-Yu Huang; Yi-Ping Su; Chiun-He Lin; Chin-Long Wey; Ke-Horng Chen; Ying-Hsi Lin; Chao-Cheng Lee; Jian-Ru Lin; Tsung-Yen Tsai (A-SSCC, 2015)

Pseudo AC current synthesizer and DC offset-corrected technique in constant-on-time control buck converter for werable electronics. - Jui-Che Su; Wei-Chung Chen; Wei-Tin Lin; Ying-Wei Chou; Meng-Wei Chien; Chin-Long Wey; Ke-Horng Chen; Ying-Hsi Lin; Chao-Cheng Lee; Shian-Ru Lin; Tsung-Yen Tsai (A-SSCC, 2015)

Suppressing output overshoot voltage technique with 47.1mW/μs power-recycling rate and 93% peak efficiency DC-DC converter for multi-core processors. - Meng-Wei Chien; Wen-Hau Yang; Ying-Wei Chou; Hsin-Chieh Chen; Wei-Chung Chen; Ke-Horng Chen; Chin-Long Wey; Shin-Chi Lai; Ying-Hsi Lin; Chao-Cheng Lee; Jian-Ru Lin; Tsung-Yen Tsai; et al. (ESSCIRC, 2015)

120V/ns output slew rate enhancement technique and high voltage clamping circuit in high integrated gate driver for power GaN FETs. - Hsiang-An Yang; Chao-Chang Chiu; Shin-Chi Lai; Jui-Lung Chen; Chih-Wei Chang; Che-Hao Meng; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Chao-Cheng Lee; Jian-Ru Lin; Tsung-Yen Tsai; et al. (ESSCIRC, 2015)

12.6 90% Peak efficiency single-inductor-multiple-output DC-DC buck converter with output independent gate drive control. - Yi-Ping Su; Chiun-He Lin; Shen-Yu Peng; Ru-Yu Huang; Te-Fu Yang; Shin-Hao Chen; Ting-Jung Lo; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Chao-Cheng Lee; Jian-Ru Lin; et al. (ISSCC, 2015)

Efficient Algorithm and Fast Hardware Implementation for Multiply-by-(1+2k). - Chin-Long Wey; Ping-Chang Jui; Muh-Tian Shiue (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015)

Performance-Driven Unit-Capacitor Placement of Successive-Approximation-Register ADCs. - Chien-Chih Huang; Chin-Long Wey; Jwu-E Chen; Pei-Wen Luo (ACM Trans. Design Autom. Electr. Syst., 2015)

A digital low-dropout-regulator with steady-state load current (SLC) estimator and dynamic gain scaling (DGS) control. - Jian-He Lin; Wen-Jie Tsou; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Jian-Ru Lin; Lsung-Yen Lsai (APCCAS, 2016)

93% Efficiency and 0.99 power factor in pseudo-linear LED driver. - Shao-Wei Chiu; Chun-Chieh Kuo; Kai-Cheng Chuang; Wen-Hau Yang; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Jian-Ru Lin; Lsung-Yen Lsai; Jui-Lung Chen (A-SSCC, 2016)

Ultra-low voltage ripple in DC-DC boost converter by the pumping capacitor and wire inductance technique. - Chen-Fan Tang; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Jian-Ru Lin; Tsung-Yen Tsai (A-SSCC, 2016)

Lossless inductor current control in envelope tracking supply modulator with self-allocation of energy for optimzation of efficiency and EVM. - Shang-Hsien Yang; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Jian-Ru Lin; Tsung-Yen Tsai (A-SSCC, 2016)

A new cuffless optical sensor for blood pressure measuring with self-adaptive signal processing. - Yung-Hua Kao; Paul C.-P. Chao 001; Tse-Yi Tu; Keng-Yueh Chiang; Chin-Long Wey (IEEE SENSORS, 2016)

12.7 A 96%-efficiency and 0.5%-current-cross-regulation single-inductor multiple floating-output LED driver with 24b color resolution. - Hsiang-An Yang; Wen-Hau Yang; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Chao-Cheng Lee; Jian-Ru Lin; Tsung-Yen Tsai; Shin-Chi Lai (ISSCC, 2016)

95% light-load efficiency single-inductor dual-output DC-DC buck converter with synthesized waveform control technique for USB type-C. - Wen-Hau Yang; Chiun-He Lin; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Jian-Ru Lin; Tsung-Yen Tsai; Jui-Lung Chen (VLSI Circuits, 2016)

Multiplication of a Constant (2k ± 1) and Its Fast Hardware Implementation. - Ping-Chang Jui; Chin-Long Wey; Muh-Tian Shiue (J. Signal Process. Syst., 2016)

Unsymmetrical parallel switched-capacitor (UP-SC) regulator with fast searching optimum ratio technique. - Yen-Ting Lin; Wen-Hau Yang; Yu-Sheng Ma; Yan-Jiun Lai; Hung-Wei Chen; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Jian-Ru Lin; Tsung-Yen Tsai (ESSCIRC, 2017)

A low quiescent current and cross regulation single-inductor dual-output converter with stacking MOSFET driving technique. - Yu-Sheng Ma; Wen-Hau Yang; Yen-Ting Lin; Hsin Chen; Li-Chi Lin; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Jian-Ru Lin; Tsung-Yen Tsai; Jui-Lung Chen (ESSCIRC, 2017)

Live demonstration: A novel cuffless photoplethysmography sensor for continuous blood pressure measurement. - Yung-Hua Kao; Paul C.-P. Chao 001; Yueh Hung; Chin-Long Wey (IEEE SENSORS, 2017)

A new reflective PPG LED-PD sensor module for cuffless blood pressure measurement at wrist artery. - Yung-Hua Kao; Paul C.-P. Chao 001; Yueh Hung; Chin-Long Wey (IEEE SENSORS, 2017)

10.5 A three-level single-inductor triple-output converter with an adjustable flying-capacitor technique for low output ripple and fast transient response. - Li-Cheng Chu; Wen-Hau Yang; Xiao-Qing Zhang; Yan-Jiun Lai; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Shian-Ru Lin; Tsung-Yen Tsai (ISSCC, 2017)

20.2 Digital low-dropout regulator with anti PVT-variation technique for dynamic voltage scaling and adaptive voltage scaling multicore processor. - Wen-Jie Tsou; Wen-Hau Yang; Jian-He Lin; Hsin Chen; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Shian-Ru Lin; Tsung-Yen Tsai (ISSCC, 2017)

2.3 A single-inductor dual-output converter with linear-amplifier-driven cross regulation for prioritized energy-distribution control of envelope-tracking supply modulator. - Shang-Hsien Yang; Yen-Ting Lin; Yu-Sheng Ma; Hung-Wei Chen; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Shian-Ru Lin; Tsung-Yen Tsai (ISSCC, 2017)

PACES: A Partition-Centering-Based Symmetry Placement for Binary-Weighted Unit Capacitor Arrays. - Chien-Chih Huang; Jwu-E Chen; Chin-Long Wey (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Design and Implementation of OLED Driving and OPD Readout Circuitry for an Optical Vibration Sensor. - Yi-Cheng Wu; Yung-Hua Kao; Paul C.-P. Chao 001; Chin-Long Wey; Thilo Sauter; Fitrah P. Eka; Rajeev Pandey (IEEE SENSORS, 2018)

A Portable, Wireless Photoplethysomography Sensor for Assessing Health of Arteriovenous Fistula Using Class-Weighted Support Vector Machine. - Paul C.-P. Chao 001; Pei-Yu Chiang; Yung-Hua Kao; Tse-Yi Tu; Chih-Yu Yang; Der-Cherng Tarng; Chin-Long Wey (Sensors, 2018)

Quality Evaluation via PPG on the AVFs of Hemodialysis Patients Based on Both Blood Flow Volume and Degree of Stenosis. - Pei-Yu Chiang; Paul C.-P. Chao 001; Tse-Yi Tu; Yung-Hua Kao; Chih-Yu Yang; Der-Cherng Tarng; Chin-Long Wey; Duc Huy Nguyen (IEEE SENSORS, 2019)

Machine Learning Classification for Assessing the Degree of Stenosis and Blood Flow Volume at Arteriovenous Fistulas of Hemodialysis Patients Using a New Photoplethysmography Sensor Device. - Pei-Yu Chiang; Paul C.-P. Chao 001; Tse-Yi Tu; Yung-Hua Kao; Chih-Yu Yang; Der-Cherng Tarng; Chin-Long Wey (Sensors, 2019)