A wide pull-in range fast acquisition hardware-sharing two-fold carrier recovery loop. - Ching-Chi Chang; Chien-Chih Lin; Muh-Tian Shiue; Chorng-Kuang Wang (ISCAS (4), 2001)

High speed pilot-less sampling frequency acquisition for DMT systems. - Ching-Chi Chang; Chorng-Kuang Wang (ISCAS (5), 2005)

Digital VLSI OFDM transceiver architecture for wireless SoC design. - Wei-Hsiang Tseng; Ching-Chi Chang; Chorng-Kuang Wang (ISCAS (6), 2005)

Arvon: A Heterogeneous SiP Integrating a 14nm FPGA and Two 22nm 1.8TFLOPS/W DSPs with 1.7Tbps/mm2 AIB 2.0 Interface to Provide Versatile Workload Acceleration. - Wei Tang 010; Sung-Gun Cho; Tim Tri Hoang; Jacob Botimer; Wei Qiang Zhu; Ching-Chi Chang; Cheng-Hsun Lu; Junkang Zhu; Yaoyu Tao; Tianyu Wei; Naomi Kavi Motwani; Mani Yalamanchi; et al. (VLSI Technology and Circuits, 2023)

Arvon: A Heterogeneous System-in-Package Integrating FPGA and DSP Chiplets for Versatile Workload Acceleration. - Wei Tang 010; Sung-Gun Cho; Tim Tri Hoang; Jacob Botimer; Wei Qiang Zhu; Ching-Chi Chang; Cheng-Hsun Lu; Junkang Zhu; Yaoyu Tao; Tianyu Wei; Naomi Kavi Motwani; Mani Yalamanchi; et al. (IEEE J. Solid State Circuits, 2024)