High Throughput Hardware Implementation for Deep Learning AI Accelerator. - Chung-Bin Wu; Yu-Cheng Hsueh; Ching-Shun Wang; Yen-Chi Lai (ICCE-TW, 2019)

Reconfigurable Hardware Architecture Design and Implementation for AI Deep Learning Accelerator. - Chung-Bin Wu; Ching-Shun Wang; Yu-Kuan Hsiao (GCCE, 2020)