Reinforcement-Learning-Based Test Program Generation for Software-Based Self-Test. - Ching-Yuan Chen; Jiun-Lang Huang (ATS, 2019)

Testability Measures Considering Circuit Reconvergence to Reduce ATPG Runtime. - Kai-Hsun Chen; Ching-Yuan Chen; Jiun-Lang Huang (DDECS, 2019)

Potential Usefulness of Single Photon Emission Computed Tomography/Computed Tomography in Management of Patients with Failed Back Surgery Syndrome. - Bor-Ren Huang; Bing-Ru Peng; Lung-Kwang Pan; Ching-Yuan Chen (J. Medical Imaging Health Informatics, 2019)

Improved Design and In Vivo Animal Tests of Bone-Guided Cochlear Implant Microsystem with Monopolar Biphasic Multiple Stimulation and Neural Action Potential Acquisition. - Sung-Hao Wang; Yu-Kai Huang; Ching-Yuan Chen; Chia-Fone Lee; Chia-Hsiang Yang; Chung-Chih Hung; Chien-Hao Liu; Ming-Dou Ker; Chung-Yu Wu (A-SSCC, 2020)

Functional-Like Transition Delay Fault Test-Pattern Generation using a Bayesian-Based Circuit Model. - Ching-Yuan Chen; Ching-Hong Cheng; Jiun-Lang Huang; Krishnendu Chakrabarty (ETS, 2020)

Pruning of Deep Neural Networks for Fault-Tolerant Memristor-based Accelerators. - Ching-Yuan Chen; Krishnendu Chakrabarty (DAC, 2021)

Efficient Identification of Critical Faults in Memristor Crossbars for Deep Neural Networks. - Ching-Yuan Chen; Krishnendu Chakrabarty (DATE, 2021)

Efficient Fault-Criticality Analysis for AI Accelerators using a Neural Twin∗. - Arjun Chaudhuri; Ching-Yuan Chen; Jonti Talukdar; Siddarth Madala; Abhishek Kumar Dubey; Krishnendu Chakrabarty (ITC, 2021)

On-line Functional Testing of Memristor-mapped Deep Neural Networks using Backdoored Checksums. - Ching-Yuan Chen; Krishnendu Chakrabarty (ITC, 2021)

Design of a Bone-Guided Cochlear Implant Microsystem With Monopolar Biphasic Multiple Stimulations and Evoked Compound Action Potential Acquisition and Its In Vivo Verification. - Sung-Hao Wang; Yu-Kai Huang; Ching-Yuan Chen; Li-Yang Tang; Yen-Fu Tu; Po-Chih Chang; Chia-Fone Lee; Chia-Hsiang Yang; Chung-Chih Hung; Chien-Hao Liu; Ming-Dou Ker; Chung-Yu Wu (IEEE J. Solid State Circuits, 2021)

Efficient Identification of Critical Faults in Memristor-Based Inferencing Accelerators. - Ching-Yuan Chen; Krishnendu Chakrabarty (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Attacking Memristor-Mapped Graph Neural Network by Inducing Slow-to-Write Errors. - Ching-Yuan Chen; Biresh Kumar Joardar; Janardhan Rao Doppa; Partha Pratim Pande; Krishnendu Chakrabarty (ETS, 2023)

Functional Test Generation for AI Accelerators using Bayesian Optimization∗. - Arjun Chaudhuri; Ching-Yuan Chen; Jonti Talukdar; Krishnendu Chakrabarty (VTS, 2023)

Benchmarking Cognitive Domains for LLMS: Insights from Taiwanese Hakka Culture. - Chen-Chi Chang; Ching-Yuan Chen; Hung-Shin Lee; Chih-Cheng Lee (O-COCOSDA, 2024)

Context-Aware Replanning with Pre-explored Semantic Map for Object Navigation. - Hung-Ting Su; Ching-Yuan Chen; Po-Chen Ko; Jia-Fong Yeh; Min Sun; Winston H. Hsu (CoRR, 2024)

Mitigating Slow-to-Write Errors in Memristor-Mapped Graph Neural Networks Induced by Adversarial Attacks. - Ching-Yuan Chen; Biresh Kumar Joardar; Janardhan Rao Doppa; Partha Pratim Pande; Krishnendu Chakrabarty (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)