A 4.8-6.4 Gbps serial link for back-plane applications using decision feedback equalization. - Vishnu Balan; Joe Caroselli; Jenn-Gang Chern; Chintan Desai; Cathy Liu 001 (CICC, 2004)

A 4.8-6.4-Gb/s serial link for backplane applications using decision feedback equalization. - Vishnu Balan; Joe Caroselli; Jenn-Gang Chern; Catherine Chow; Ratnakar Dadi; Chintan Desai; Leo Fang; David Hsu; Pankaj Joshi; Hiroshi Kimura; Cathy Ye Liu; Tzu-Wang Pan; et al. (IEEE J. Solid State Circuits, 2005)

A 1.0625-to-14.025Gb/s multimedia transceiver with full-rate source-series-terminated transmit driver and floating-tap decision-feedback equalizer in 40nm CMOS. - Shaolei Quan; Freeman Zhong; Wing Liu; Pervez M. Aziz; Tai Jing; Jen Dong; Chintan Desai; Hairong Gao; Monica Garcia; Gary Hom; Tony Huynh; Hiroshi Kimura; et al. (ISSCC, 2011)

A 1.0625 14.025 Gb/s Multi-Media Transceiver With Full-Rate Source-Series-Terminated Transmit Driver and Floating-Tap Decision-Feedback Equalizer in 40 nm CMOS. - Freeman Zhong; Shaolei Quan; Wing Liu; Pervez M. Aziz; Tai Jing; Jen Dong; Chintan Desai; Hairong Gao; Monica Garcia; Gary Hom; Tony Huynh; Hiroshi Kimura; et al. (IEEE J. Solid State Circuits, 2011)