A unified architecture of MD5 and RIPEMD-160 hash algorithms. - Chiu-Wah Ng; Tung-Sang Ng; Kun-Wah Yip (ISCAS (2), 2004)

Bit-Stream Adders and Multipliers for Tri-Level Sigma-Delta Modulators. - Chiu-Wah Ng; Ngai Wong 001; Tung-Sang Ng (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

Direct sigma-delta modulated signal processing in FPGA. - Chiu-Wah Ng; Ngai Wong 001; Hayden Kwok-Hay So; Tung-Sang Ng (FPL, 2008)

Quad-level bit-stream signal processing on FPGAs. - Chiu-Wah Ng; Ngai Wong 001; Hayden Kwok-Hay So; Tung-Sang Ng (FPT, 2008)

On IIR-based bit-stream multipliers. - Chiu-Wah Ng; Ngai Wong 001; Hayden Kwok-Hay So; Tung-Sang Ng (Int. J. Circuit Theory Appl., 2011)