A 64Gb 533Mb/s DDR interface MLC NAND Flash in sub-20nm technology. - Daeyeal Lee; Ik Joon Chang; Sangyong Yoon; Joonsuc Jang; Dong-Su Jang; Wook-Ghee Hahn; Jong-Yeol Park; Doo-Gon Kim; Chiweon Yoon; Bong-Soon Lim; ByungJun Min; Sung-Won Yun; et al. (ISSCC, 2012)

A 512Gb 3-bit/Cell 3D 6th-Generation V-NAND Flash Memory with 82MB/s Write Throughput and 1.2Gb/s Interface. - Dongku Kang; Minsu Kim 004; Suchang Jeon; Wontaeck Jung; Jooyong Park; Gyo Soo Choo; Dong-Kyo Shim; Anil Kavala; Seungbum Kim; Kyung-Min Kang; Jiyoung Lee; Kuihan Ko; et al. (ISSCC, 2019)

A 1.8 Gb/s/pin 16Tb NAND Flash Memory Multi-Chip Package with F-Chip of Toggle 4.0 Specification for High Performance and High Capacity Storage Systems. - Jang-Woo Lee; Dae-Hoon Na; Anil Kavala; Hwasuk Cho; Junha Lee; Manjae Yang; Eunjin Song; Tongsung Kim; Seon-Kyoo Lee; Dong-Su Jang; Byung-Kwan Chun; Youngmin Jo; et al. (VLSI Circuits, 2020)

A Hybrid ZQ Calibration Design for High-Density Flash Memory Toggle 5.0 High-speed Interface. - Tongsung Kim; Anil Kavala; Hyunsuk Kang; Youngmin Jo; Jungjune Park; Kyoungtae Kang; Byung-Kwan Chun; Dong-Ho Shin; Dong-Su Jang; Byunghoon Jeong; Chiweon Yoon; Jinyub Lee; et al. (A-SSCC, 2021)

Issues and Key Technologies for Next Generation 3D NAND. - Chiweon Yoon; Hyunggon Kim; Seon-Kyoo Lee; Jinyub Lee; Jai Hyuk Song (ICEIC, 2021)

A 512Gb 3b/Cell 7th -Generation 3D-NAND Flash Memory with 184MB/s Write Throughput and 2.0Gb/s Interface. - Jiho Cho; D. Chris Kang; Jongyeol Park; Sangwan Nam; Jung-Ho Song; Bong-Kil Jung; Jaedoeg Lyu; Hogil Lee; Won-Tae Kim 004; Hongsoo Jeon; Sunghoon Kim 001; In-Mo Kim; et al. (ISSCC, 2021)

A 1.8-Gb/s/Pin 16-Tb NAND Flash Memory Multi-Chip Package With F-Chip for High-Performance and High-Capacity Storage. - Dae-Hoon Na; Jang-Woo Lee; Seon-Kyoo Lee; Hwasuk Cho; Junha Lee; Manjae Yang; Eunjin Song; Anil Kavala; Tongsung Kim; Dong-Su Jang; Youngmin Jo; Ji-Yeon Shin; et al. (IEEE J. Solid State Circuits, 2021)

A 1Tb 3b/Cell 8th-Generation 3D-NAND Flash Memory with 164MB/s Write Throughput and a 2.4Gb/s Interface. - Moosung Kim; Sung-Won Yun; Jungjune Park; Hyun Kook Park; Jungyu Lee 002; Yeong Seon Kim; Dae-Hoon Na; Sara Choi; Youngsun Song; Jonghoon Lee; Hyun-Jun Yoon; Kangbin Lee; et al. (ISSCC, 2022)

Integrated Circuit to Compensate Parasitic Leakage Component for WL Leakage Current in NAND Flash Memory. - Bu-Il Nam; Jayang Yoon; Kyunghea Lee; Sol Kim; Junhong Park; Chiweon Yoon; Eunkyoung Kim (A-SSCC, 2023)

A 3.0 Gb/s/pin 4th generation F-chip with Toggle 5.0 Specification for 16Tb NAND Flash Memory Multi chip Package. - Youngmin Jo; Anil Kavala; Tongsung Kim; Byung-Kwan Chun; Jungjune Park; Taesung Lee; Jungmin Seo; Manjae Yang; Taehyeon Park; Hyunjin Kwon; Cheolhui Lee; Younghoon Son; et al. (VLSI Technology and Circuits, 2023)

30.1 A 28Gb/mm24XX-Layer 1Tb 3b/Cell WF-Bonding 3D-NAND Flash with 5.6Gb/s/Pin IOs. - Sang-Soo Park; Jaedoeg Lyu; Myungjun Kim; Jaeyun Lee; Youngsun Song; Chungho Yu; Makoto Hirano; Yongseok Kwon; Jonghoon Park; Hojoon Kim; Daein Lee; Donghyun Seo; et al. (ISSCC, 2025)