CTA: A Critical Task Aware Scheduling Mechanism for Dataflow Architecture. - Yan Ou; Chongfei Shen; Yujing Feng; Xinxin Wu; Wenming Li; Xiaochun Ye; Dongrui Fan (ICA3PP (1), 2020)

A Novel Predictor with Optimized Sampling Method for Hardware-aware NAS. - Yue Hu 004; Chongfei Shen; Lixin Yang; Zhipeng Wu; Yu Liu 004 (ICPR, 2022)

A Voltage Error Quantizer For Digital Low Dropout Regulators With Fast Transient Response and Low Steady-State Error. - Kaize Zhou; Dejian Li; Chongfei Shen; Yuxuan Du; Zhuo Chen; Weiwei Shan (ICTA, 2022)

Vector-Based Dedicated Processor Architecture for Efficient Tracking in VSLAM Systems. - Dejian Li; Xi Feng; Chongfei Shen; Qi Chen; Lixin Yang; Sihai Qiu; Xin Jin; Meng Liu 018 (IEEE Embed. Syst. Lett., 2023)

An Efficient Hardware Accelerator for Block Sparse Convolutional Neural Networks on FPGA. - Xiaodi Yin; Zhipeng Wu; Dejian Li; Chongfei Shen; Yu Liu 004 (IEEE Embed. Syst. Lett., 2024)

Clock mesh synthesis through dynamic programming with physical parameters consideration. - Dejian Li; Jie Gan; Chongfei Shen; Qi Chen; Lixin Yang; Sihai Qiu; Xin Jin; Tiantian Wu; Zhijie Chen; Meng Liu 018 (Integr., 2025)

PttAcc: Pipeline-Based Taylor Expansion Fitting Arctangent Angle Hardware Accelerator Design for Descriptor Duty in ORB-SLAM System. - Meng Liu 018; Fei Xiao; Ruijie Wang; Peiyuan Wan; Zhijie Chen; Dejian Li; Chongfei Shen (IEEE Embed. Syst. Lett., 2025)