Design and Co-Simulation of QPSK and NRZ/PAM-4/PAM-8 VCSEL-Based Optical Links Utilizing an Integrated System Evaluation Engine. - Fuzhan Chen; Chongyun Zhang; Tianxin Min; Bo Xu; Quan Pan 002; C. Patrick Yue (ASICON, 2021)

An Integrated System Evaluation Engine for Cross-Domain Simulation and Design Optimization of High-Speed 5G Millimeter-Wave Wireless SoCs. - Weimin Shi; Fuzhan Chen; Xinyi Liu; Chongyun Zhang; Zilu Liu; Tianxin Min; Bo Xu; Li Wang; Jian Kang; C. Patrick Yue (ASICON, 2021)

A 56-Gb/s PAM-4 Transmitter Using Silicon Photonic Microring Modulator in 40nm CMOS. - Chongyun Zhang; Fuzhan Chen; C. Patrick Yue (MWSCAS, 2022)

A 2.05-pJ/b 56-Gb/s PAM-4 VCSEL Transmitter with Piecewise Nonlinearity Compensation and Asymmetric Equalization in 40-nm CMOS. - Fuzhan Chen; Chongyun Zhang; Li Wang 083; Quan Pan 002; C. Patrick Yue (ESSCIRC, 2023)

A 48-Gb/s Half-Rate PAM4 Optical Receiver with 0.27-pJ/bit TIA Efficiency, 1.28-pJ/bit RX Efficiency, and 0.06-mm2 area in 28-nm CMOS. - Chongyun Zhang; Li Wang 083; Zilu Liu; Fuzhan Chen; Quan Pan 002; Xianbo Li; C. Patrick Yue (VLSI Technology and Circuits, 2024)