A 220 mW 1 Gb/s 1024-bit rate-1/2 low density parity check code decoder. - Chris J. Howland; Andrew J. Blanksby (CICC, 2001)

Parallel decoding architectures for low density parity check codes. - Chris J. Howland; Andrew J. Blanksby (ISCAS (4), 2001)

A low power normalized-LMS decision feedback equalizer for a wireless packet modem. - David Garrett; Chris Nicol; Andrew J. Blanksby; Chris J. Howland (ISLPED, 2002)

A 690-mW 1-Gb/s 1024-b, rate-1/2 low-density parity-check code decoder. - Andrew J. Blanksby; Chris J. Howland (IEEE J. Solid State Circuits, 2002)