A Systolic Architecture for High Speed Pipelined Memories. - Alex G. Dickinson; Chris J. Nicol (ICCD, 1993)

Application Specific Memories for ATM Packet Switching. - Alex G. Dickinson; Chris J. Nicol; Sailesh K. Rao; Mehdi Hatamian (ISCAS, 1994)

Transition reduction in carry-save adder trees. - Patrik Larsson; Chris J. Nicol (ISLPED, 1996)

A scalable pipelined architecture for fast buffer SRAMs. - Chris J. Nicol; Alex G. Dickinson (IEEE J. Solid State Circuits, 1996)

Low power multiplication for FIR filters. - Chris J. Nicol; Patrik Larsson (ISLPED, 1997)

A low-power 128-tap digital adaptive equalizer for broadband modems. - Chris J. Nicol; Patrik Larsson; Kamran Azadet; Jay H. O'Neill (IEEE J. Solid State Circuits, 1997)

Reconfigurable hardware for efficient implementation of programmable FIR filters. - Tracy C. Denk; Chris J. Nicol; Patrik Larsson; Kamran Azadet (ICASSP, 1998)

A single-chip, 1.6-billion, 16-b MAC/s multiprocessor DSP. - Bryan D. Ackland; A. Anesko; D. Brinthaupt; S. J. Daubert; Asawaree Kalavade; J. Knobloch; E. Micca; M. Moturi; Chris J. Nicol; Jay H. O'Neill; Joe Othmer; Eduard Sackinger; et al. (IEEE J. Solid State Circuits, 2000)